linux-kernel - Re: [PATCH 23/35] x86/speculation: Add basic speculation control code

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Message-ID: <a0308ee6-959a-0a78-9205-8de0a60948ac@redhat.com>
Date:   Thu, 18 Jan 2018 18:12:36 +0100
From:   Paolo Bonzini <pbonzini@...hat.com>
To:     Dave Hansen <dave.hansen@...el.com>,
        Josh Poimboeuf <jpoimboe@...hat.com>,
        Peter Zijlstra <peterz@...radead.org>
Cc:     David Woodhouse <dwmw2@...radead.org>,
        Thomas Gleixner <tglx@...utronix.de>,
        linux-kernel@...r.kernel.org, Ashok Raj <ashok.raj@...el.com>,
        Tim Chen <tim.c.chen@...ux.intel.com>,
        Andy Lutomirski <luto@...nel.org>,
        Linus Torvalds <torvalds@...ux-foundation.org>,
        Greg KH <gregkh@...uxfoundation.org>,
        Andrea Arcangeli <aarcange@...hat.com>,
        Andi Kleen <ak@...ux.intel.com>,
        Arjan Van De Ven <arjan.van.de.ven@...el.com>,
        Dan Williams <dan.j.williams@...el.com>,
        Jun Nakajima <jun.nakajima@...el.com>,
        Asit Mallick <asit.k.mallick@...el.com>,
        Jason Baron <jbaron@...mai.com>
Subject: Re: [PATCH 23/35] x86/speculation: Add basic speculation control code

On 18/01/2018 18:08, Dave Hansen wrote:
> On 01/18/2018 08:37 AM, Josh Poimboeuf wrote:
>>>
>>> --- a/Documentation/admin-guide/kernel-parameters.txt
>>> +++ b/Documentation/admin-guide/kernel-parameters.txt
>>> @@ -3932,6 +3932,7 @@
>>>  			retpoline	  - replace indirect branches
>>>  			retpoline,generic - google's original retpoline
>>>  			retpoline,amd     - AMD-specific minimal thunk
>>> +			ibrs		  - Intel: Indirect Branch Restricted Speculation
>> Are there plans to add spectre_v2=ibrs_always to prevent SMT-based
>> attacks?
> 
> What does "ibrs_always" mean to you?
> 
> There is a second bit in the MSR (STIBP) that is intended to keep
> hyperthreads from influencing each-other.  That is behavior is implicit
> when IBRS is enabled.

Yeah, I think we should have a mode to always leave that enabled, or
always set IBRS=1.

> I think ibrs_always *should* probably be kept to refer to the future
> CPUs that can safely leave IBRS enabled all the time.

Is that "safely" or "without throwing performance down the drain"?

Does "always IBRS=1" *hinder* the mitigation on existing processor, as
long as you reset IBRS=1 on kernel entry and vmexit?  Or is it just slow?

Paolo