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Message-ID: <20180118184625.kqwkrpxutiolvqyb@pd.tnic>
Date: Thu, 18 Jan 2018 19:46:25 +0100
From: Borislav Petkov <bp@...en8.de>
To: Josh Poimboeuf <jpoimboe@...hat.com>
Cc: Peter Zijlstra <peterz@...radead.org>,
David Woodhouse <dwmw2@...radead.org>,
Thomas Gleixner <tglx@...utronix.de>,
linux-kernel@...r.kernel.org, Dave Hansen <dave.hansen@...el.com>,
Ashok Raj <ashok.raj@...el.com>,
Tim Chen <tim.c.chen@...ux.intel.com>,
Andy Lutomirski <luto@...nel.org>,
Linus Torvalds <torvalds@...ux-foundation.org>,
Greg KH <gregkh@...uxfoundation.org>,
Andrea Arcangeli <aarcange@...hat.com>,
Andi Kleen <ak@...ux.intel.com>,
Arjan Van De Ven <arjan.van.de.ven@...el.com>,
Dan Williams <dan.j.williams@...el.com>,
Paolo Bonzini <pbonzini@...hat.com>,
Jun Nakajima <jun.nakajima@...el.com>,
Asit Mallick <asit.k.mallick@...el.com>,
Jason Baron <jbaron@...mai.com>
Subject: Re: [PATCH 29/35] x86/speculation: Add IPBP support
On Thu, Jan 18, 2018 at 12:35:23PM -0600, Josh Poimboeuf wrote:
> Maybe I missed the memo, why do we need both X86_FEATURE_IBPB and
> X86_FEATURE_AMD_IBPB?
So AMD_IBPB is a different CPUID bit in a different CPUID function
and on Intel, IBPB is set only when X86_FEATURE_SPEC_CTRL - see
specctrl_init_ibpb() in that same patch.
IOW, CPUID(7).EDAC[26] means both IBRS and IBPB on Intel.
So, in the end of the day, X86_FEATURE_IBPB is the feature bit we'll be
testing and X86_FEATURE_AMD_IBPB is used only to set X86_FEATURE_IBPB.
:-)
More confused?
--
Regards/Gruss,
Boris.
Good mailing practices for 400: avoid top-posting and trim the reply.
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