linux-kernel - Re: [PATCH 29/35] x86/speculation: Add IPBP support

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Message-ID: <20180118183523.dwsdh3cqq7yy4ph6@treble>
Date:   Thu, 18 Jan 2018 12:35:23 -0600
From:   Josh Poimboeuf <jpoimboe@...hat.com>
To:     Borislav Petkov <bp@...en8.de>
Cc:     Peter Zijlstra <peterz@...radead.org>,
        David Woodhouse <dwmw2@...radead.org>,
        Thomas Gleixner <tglx@...utronix.de>,
        linux-kernel@...r.kernel.org, Dave Hansen <dave.hansen@...el.com>,
        Ashok Raj <ashok.raj@...el.com>,
        Tim Chen <tim.c.chen@...ux.intel.com>,
        Andy Lutomirski <luto@...nel.org>,
        Linus Torvalds <torvalds@...ux-foundation.org>,
        Greg KH <gregkh@...uxfoundation.org>,
        Andrea Arcangeli <aarcange@...hat.com>,
        Andi Kleen <ak@...ux.intel.com>,
        Arjan Van De Ven <arjan.van.de.ven@...el.com>,
        Dan Williams <dan.j.williams@...el.com>,
        Paolo Bonzini <pbonzini@...hat.com>,
        Jun Nakajima <jun.nakajima@...el.com>,
        Asit Mallick <asit.k.mallick@...el.com>,
        Jason Baron <jbaron@...mai.com>
Subject: Re: [PATCH 29/35] x86/speculation: Add IPBP support

On Thu, Jan 18, 2018 at 07:31:16PM +0100, Borislav Petkov wrote:
> On Thu, Jan 18, 2018 at 02:48:29PM +0100, Peter Zijlstra wrote:
> > From: Thomas Gleixner <tglx@...utronix.de>
> 
> <--- Add commit message here.
> 
> > Signed-off-by: Thomas Gleixner <tglx@...utronix.de>
> > Signed-off-by: Peter Zijlstra (Intel) <peterz@...radead.org>
> > ---
> >  arch/x86/include/asm/cpufeatures.h   |    4 +++-
> >  arch/x86/include/asm/msr-index.h     |    3 +++
> >  arch/x86/include/asm/nospec-branch.h |    9 +++++++++
> >  arch/x86/kernel/cpu/bugs.c           |    2 ++
> >  arch/x86/kernel/cpu/specctrl.c       |    9 +++++++++
> >  5 files changed, 26 insertions(+), 1 deletion(-)
> > 
> > --- a/arch/x86/include/asm/cpufeatures.h
> > +++ b/arch/x86/include/asm/cpufeatures.h
> > @@ -212,8 +212,9 @@
> >  
> >  #define X86_FEATURE_MBA			( 7*32+18) /* Memory Bandwidth Allocation */
> >  #define X86_FEATURE_RSB_CTXSW		( 7*32+19) /* Fill RSB on context switches */
> > -#define X86_FEATURE_SPEC_CTRL		( 7*32+20) /* Speculation Control */
> > +#define X86_FEATURE_SPEC_CTRL		( 7*32+20) /* Speculation Control - Intel only */
> >  #define X86_FEATURE_IBRS		( 7*32+21) /* Indirect Branch Restricted Speculation */
> > +#define X86_FEATURE_IBPB		( 7*32+22) /* Indirect Branch Prediction Barrier */
> >  
> >  /* Virtualization flags: Linux defined, word 8 */
> >  #define X86_FEATURE_TPR_SHADOW		( 8*32+ 0) /* Intel TPR Shadow */
> > @@ -273,6 +274,7 @@
> >  #define X86_FEATURE_CLZERO		(13*32+ 0) /* CLZERO instruction */
> >  #define X86_FEATURE_IRPERF		(13*32+ 1) /* Instructions Retired Count */
> >  #define X86_FEATURE_XSAVEERPTR		(13*32+ 2) /* Always save/restore FP error pointers */
> > +#define X86_FEATURE_AMD_IBPB		(13*32+12) /* Indirect Branch Prediction Barrier support */
> 
> I guess you could make that
> 
> #define X86_FEATURE_AMD_IBPB		(13*32+12) /* "" Indirect Branch Prediction Barrier support */
> 
> (note the "" in the comment)
> 
> so that it doesn't appear in /proc/cpuinfo as those two flags denote the
> same thing.

Maybe I missed the memo, why do we need both X86_FEATURE_IBPB and
X86_FEATURE_AMD_IBPB?

-- 
Josh