lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <CAL_Jsq+astLAtLM=nhvSoT+3DLwWybppbCxvKV08F_QkYk90Dg@mail.gmail.com>
Date:   Mon, 22 Jan 2018 08:46:13 -0600
From:   Rob Herring <robh+dt@...nel.org>
To:     Philippe CORNU <philippe.cornu@...com>
Cc:     Yannick FERTRE <yannick.fertre@...com>,
        Benjamin Gaignard <benjamin.gaignard@...aro.org>,
        Vincent ABRIOU <vincent.abriou@...com>,
        David Airlie <airlied@...ux.ie>,
        Mark Rutland <mark.rutland@....com>,
        Maxime Coquelin <mcoquelin.stm32@...il.com>,
        Alexandre TORGUE <alexandre.torgue@...com>,
        dri-devel <dri-devel@...ts.freedesktop.org>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@...r.kernel.org>,
        "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" 
        <linux-arm-kernel@...ts.infradead.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        Mickael REULIER <mickael.reulier@...com>,
        Gabriel FERNANDEZ <gabriel.fernandez@...com>,
        Ludovic BARRE <ludovic.barre@...com>
Subject: Re: [PATCH] dt-bindings: display: stm32: correct clock-names in dsi
 panel example

On Mon, Jan 22, 2018 at 8:39 AM, Philippe CORNU <philippe.cornu@...com> wrote:
> Hi Rob,
>
> On 01/22/2018 03:30 PM, Rob Herring wrote:
>> On Sun, Jan 21, 2018 at 2:58 PM, Philippe Cornu <philippe.cornu@...com> wrote:
>>> In the dsi panel example, clock names in the "clock-names"
>>> field have been swapped:
>>> * "pclk" (peripheral clock) is <&rcc 1 CLK_F469_DSI> on stm32f4
>>> * "ref" (dsi phy pll ref clock) is <&clk_hse> on stm32f4
>>>
>>> Signed-off-by: Philippe Cornu <philippe.cornu@...com>
>>> ---
>>>   Documentation/devicetree/bindings/display/st,stm32-ltdc.txt | 2 +-
>>>   1 file changed, 1 insertion(+), 1 deletion(-)
>>>
>>> diff --git a/Documentation/devicetree/bindings/display/st,stm32-ltdc.txt b/Documentation/devicetree/bindings/display/st,stm32-ltdc.txt
>>> index 029252253ad4..3eb1b48b47dd 100644
>>> --- a/Documentation/devicetree/bindings/display/st,stm32-ltdc.txt
>>> +++ b/Documentation/devicetree/bindings/display/st,stm32-ltdc.txt
>>> @@ -98,7 +98,7 @@ Example 2: DSI panel
>>>                          compatible = "st,stm32-dsi";
>>>                          reg = <0x40016c00 0x800>;
>>>                          clocks = <&rcc 1 CLK_F469_DSI>, <&clk_hse>;
>>> -                       clock-names = "ref", "pclk";
>>> +                       clock-names = "pclk", "ref";
>>
>> There is no way to tell they are reversed because pclk is not even
>> documented. Please fix that too.
>>
>
> Many thanks for your review.
>
> pclk is already described in the generic part
> (Documentation/devicetree/bindings/display/bridge/dw_mipi_dsi.txt).

Ah, okay.

>
> In st,stm32-ltdc.txt (specific part), I have documented: "For all
> mandatory properties & nodes, please refer to the related documentation
> in [5]".
>
> Do you think it is clear enough?

Yes.

Please resend both patches and I'll apply.

Rob

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ