linux-kernel - Re: [PATCH] x86: vmx: Allow direct access to MSR_IA32_SPEC

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Message-Id: <86F5D9C0-7B11-448D-954F-D2EF6CBE80EC@amacapital.net>
Date:   Sun, 28 Jan 2018 12:40:38 -0800
From:   Andy Lutomirski <luto@...capital.net>
To:     Konrad Rzeszutek Wilk <konrad.wilk@...cle.com>
Cc:     KarimAllah Ahmed <karahmed@...zon.de>, kvm@...r.kernel.org,
        linux-kernel@...r.kernel.org,
        Asit Mallick <asit.k.mallick@...el.com>,
        Arjan Van De Ven <arjan.van.de.ven@...el.com>,
        Dave Hansen <dave.hansen@...el.com>,
        Andi Kleen <ak@...ux.intel.com>,
        Andrea Arcangeli <aarcange@...hat.com>,
        Linus Torvalds <torvalds@...ux-foundation.org>,
        Tim Chen <tim.c.chen@...ux.intel.com>,
        Thomas Gleixner <tglx@...utronix.de>,
        Dan Williams <dan.j.williams@...el.com>,
        Jun Nakajima <jun.nakajima@...el.com>,
        Paolo Bonzini <pbonzini@...hat.com>,
        David Woodhouse <dwmw@...zon.co.uk>,
        Greg KH <gregkh@...uxfoundation.org>,
        Andy Lutomirski <luto@...nel.org>,
        Ashok Raj <ashok.raj@...el.com>, daniel.kiper@...cle.com
Subject: Re: [PATCH] x86: vmx: Allow direct access to MSR_IA32_SPEC_CTRL


> On Jan 28, 2018, at 12:21 PM, Konrad Rzeszutek Wilk <konrad.wilk@...cle.com> wrote:
> 
>> On January 28, 2018 2:29:10 PM EST, KarimAllah Ahmed <karahmed@...zon.de> wrote:
>> Add direct access to MSR_IA32_SPEC_CTRL for guests. This is needed for
>> guests
>> that will only mitigate Spectre V2 through IBRS+IBPB and will not be
>> using a
>> retpoline+IBPB based approach.
>> 
>> To avoid the overhead of atomically saving and restoring the
>> MSR_IA32_SPEC_CTRL
>> for guests that do not actually use the MSR, only add_atomic_switch_msr
>> when a
>> non-zero is written to it.
> 
> 
> We tried this and found that it was about 3% slower that doing the old way of rdmsr and wrmsr.
> 

Do you mean that the host would intercept the guest WRMSR and do WRMSR itself?  I would suggest that doing so is inconsistent with the docs.  As specified, doing WRMSR to write 1 to IBRS does *not* protect the guest.

For that matter, what are the semantics of VMRESUME doing a write to IBRS as part of its MSR switch?  Is it treated as IBRS=1 from guest context?