linux-kernel - Re: [PATCH] x86: vmx: Allow direct access to MSR_IA32_SPEC

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <1517172296.6624.84.camel@infradead.org>
Date:   Sun, 28 Jan 2018 20:44:56 +0000
From:   David Woodhouse <dwmw2@...radead.org>
To:     Andy Lutomirski <luto@...capital.net>,
        Konrad Rzeszutek Wilk <konrad.wilk@...cle.com>
Cc:     KarimAllah Ahmed <karahmed@...zon.de>, kvm@...r.kernel.org,
        linux-kernel@...r.kernel.org,
        Asit Mallick <asit.k.mallick@...el.com>,
        Arjan Van De Ven <arjan.van.de.ven@...el.com>,
        Dave Hansen <dave.hansen@...el.com>,
        Andi Kleen <ak@...ux.intel.com>,
        Andrea Arcangeli <aarcange@...hat.com>,
        Linus Torvalds <torvalds@...ux-foundation.org>,
        Tim Chen <tim.c.chen@...ux.intel.com>,
        Thomas Gleixner <tglx@...utronix.de>,
        Dan Williams <dan.j.williams@...el.com>,
        Jun Nakajima <jun.nakajima@...el.com>,
        Paolo Bonzini <pbonzini@...hat.com>,
        Greg KH <gregkh@...uxfoundation.org>,
        Andy Lutomirski <luto@...nel.org>,
        Ashok Raj <ashok.raj@...el.com>, daniel.kiper@...cle.com
Subject: Re: [PATCH] x86: vmx: Allow direct access to MSR_IA32_SPEC_CTRL

On Sun, 2018-01-28 at 12:40 -0800, Andy Lutomirski wrote:
> 
> Do you mean that the host would intercept the guest WRMSR and do
> WRMSR itself?  I would suggest that doing so is inconsistent with the
> docs.  As specified, doing WRMSR to write 1 to IBRS does *not*
> protect the guest.

I believe it does. Guest kernel is protected from any guest userspace
predictions learned before IBRS was last set to 1 in *any* mode,
including host.

> For that matter, what are the semantics of VMRESUME doing a write to
> IBRS as part of its MSR switch?  Is it treated as IBRS=1 from guest
> context?

Why does it matter? We *have* confirmed, FWIW, that VMRESUME writing 1
to IBRS as part of its MSR switch when it was already 1 is not
optimised away and *is* treated as writing IBRS=1 again.
Download attachment "smime.p7s" of type "application/x-pkcs7-signature" (5213 bytes)