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Message-ID: <20180131172747.GA9877@raj-desk2.iind.intel.com>
Date: Wed, 31 Jan 2018 22:57:47 +0530
From: Rajneesh Bhardwaj <rajneesh.bhardwaj@...el.com>
To: Andy Shevchenko <andy.shevchenko@...il.com>
Cc: Platform Driver <platform-driver-x86@...r.kernel.org>,
Darren Hart <dvhart@...radead.org>,
Andy Shevchenko <andy@...radead.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
Vishwanath Somayaji <vishwanath.somayaji@...el.com>,
Srinivas Pandruvada <srinivas.pandruvada@...ux.intel.com>,
Dave Hansen <dave.hansen@...ux.intel.com>,
Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...hat.com>,
"H. Peter Anvin" <hpa@...or.com>, x86@...nel.org
Subject: Re: [Patch v1 6/8] x86/cpu: Add Cannonlake to Intel family
On Fri, Jan 26, 2018 at 02:39:47PM +0200, Andy Shevchenko wrote:
> On Fri, Jan 19, 2018 at 10:58 AM, Rajneesh Bhardwaj
> <rajneesh.bhardwaj@...el.com> wrote:
> > Add CPUID of Cannonlake (CNL) processors to Intel family list.
> >
> > Cc: Dave Hansen <dave.hansen@...ux.intel.com>
> > Cc: Thomas Gleixner <tglx@...utronix.de>
> > cc: Ingo Molnar <mingo@...hat.com>
> > Cc: "H. Peter Anvin" <hpa@...or.com>
> > Cc: x86@...nel.org
>
> Thomas, can you Ack this patch?
Sorry to bug you again, MAINTAINERS. The series depends on this patch for
enabling Cannonlake support. Requesting your ACK / Feedback for this one.
Thank you.
>
> > Suggested-by: Tony Luck <tony.luck@...el.com>
> > Signed-off-by: Megha Dey <megha.dey@...ux.intel.com>
> > Signed-off-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@...el.com>
> > ---
> > arch/x86/include/asm/intel-family.h | 6 ++++++
> > 1 file changed, 6 insertions(+)
> >
> > diff --git a/arch/x86/include/asm/intel-family.h b/arch/x86/include/asm/intel-family.h
> > index 35a6bc4da8ad..cf090e584202 100644
> > --- a/arch/x86/include/asm/intel-family.h
> > +++ b/arch/x86/include/asm/intel-family.h
> > @@ -10,6 +10,10 @@
> > *
> > * Things ending in "2" are usually because we have no better
> > * name for them. There's no processor called "SILVERMONT2".
> > + *
> > + * While adding a new CPUID for a new microarchitecture, add a new
> > + * group to keep logically sorted out in chronological order. Within
> > + * that group keep the CPUID for the variants sorted by model number.
> > */
> >
> > #define INTEL_FAM6_CORE_YONAH 0x0E
> > @@ -49,6 +53,8 @@
> > #define INTEL_FAM6_KABYLAKE_MOBILE 0x8E
> > #define INTEL_FAM6_KABYLAKE_DESKTOP 0x9E
> >
> > +#define INTEL_FAM6_CANNONLAKE_MOBILE 0x66
> > +
> > /* "Small Core" Processors (Atom) */
> >
> > #define INTEL_FAM6_ATOM_PINEVIEW 0x1C
> > --
> > 2.7.4
> >
>
> --
> With Best Regards,
> Andy Shevchenko
--
Best Regards,
Rajneesh
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