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Message-ID: <6f40dd95-f6bf-aac8-33ac-9fef54447ec3@monstr.eu>
Date:   Fri, 9 Feb 2018 09:51:27 +0100
From:   Michal Simek <monstr@...str.eu>
To:     Michal Simek <michal.simek@...inx.com>, devicetree@...r.kernel.org,
        Rob Herring <robh+dt@...nel.org>
Cc:     linux-kernel@...r.kernel.org, Mark Rutland <mark.rutland@....com>,
        Russell King <linux@...linux.org.uk>,
        linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH 5/5] arm: zynq: Add support for Xilinx zc770 xm013 dc4
 board

On 17.1.2018 15:41, Michal Simek wrote:
> zc770 is based board which is extended by FMC/DC cards for SoC
> validation. FMCs/DCs are supposed to cover all SoC configurations.
> FMC/DC contains can, ethernet, i2c, qspi, spi and uart.
> 
> Signed-off-by: Michal Simek <michal.simek@...inx.com>
> ---
> 
>  arch/arm/boot/dts/Makefile             |  1 +
>  arch/arm/boot/dts/zynq-zc770-xm013.dts | 78 ++++++++++++++++++++++++++++++++++
>  2 files changed, 79 insertions(+)
>  create mode 100644 arch/arm/boot/dts/zynq-zc770-xm013.dts
> 
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index 6bd4b9a29511..44be37afa544 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -1044,6 +1044,7 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \
>  	zynq-zc770-xm010.dtb \
>  	zynq-zc770-xm011.dtb \
>  	zynq-zc770-xm012.dtb \
> +	zynq-zc770-xm013.dtb \
>  	zynq-zed.dtb \
>  	zynq-zybo.dtb
>  dtb-$(CONFIG_MACH_ARMADA_370) += \
> diff --git a/arch/arm/boot/dts/zynq-zc770-xm013.dts b/arch/arm/boot/dts/zynq-zc770-xm013.dts
> new file mode 100644
> index 000000000000..ad3e1d108a9b
> --- /dev/null
> +++ b/arch/arm/boot/dts/zynq-zc770-xm013.dts
> @@ -0,0 +1,78 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Xilinx ZC770 XM013 board DTS
> + *
> + * Copyright (C) 2013 Xilinx, Inc.
> + */
> +/dts-v1/;
> +#include "zynq-7000.dtsi"
> +
> +/ {
> +	compatible = "xlnx,zynq-zc770-xm013", "xlnx,zynq-7000";
> +	model = "Xilinx Zynq";
> +
> +	aliases {
> +		ethernet0 = &gem1;
> +		i2c0 = &i2c1;
> +		serial0 = &uart0;
> +		spi1 = &spi0;
> +	};
> +
> +	chosen {
> +		bootargs = "";
> +		stdout-path = "serial0:115200n8";
> +	};
> +
> +	memory@0 {
> +		device_type = "memory";
> +		reg = <0x0 0x40000000>;
> +	};
> +};
> +
> +&can1 {
> +	status = "okay";
> +};
> +
> +&gem1 {
> +	status = "okay";
> +	phy-mode = "rgmii-id";
> +	phy-handle = <&ethernet_phy>;
> +
> +	ethernet_phy: ethernet-phy@7 {
> +		reg = <7>;
> +		device_type = "ethernet-phy";
> +	};
> +};
> +
> +&i2c1 {
> +	status = "okay";
> +	clock-frequency = <400000>;
> +
> +	si570: clock-generator@55 {
> +		#clock-cells = <0>;
> +		compatible = "silabs,si570";
> +		temperature-stability = <50>;
> +		reg = <0x55>;
> +		factory-fout = <156250000>;
> +		clock-frequency = <148500000>;
> +	};
> +};
> +
> +&spi0 {
> +	status = "okay";
> +	num-cs = <4>;
> +	is-decoded-cs = <0>;
> +	eeprom: at25@0 {

This should be probably eeprom: eeprom@25.

Rob: Do you see any other issue with this series? Or can I apply?

Thanks,
Michal

-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP SoCs




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