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Message-Id: <1518474330-8713-2-git-send-email-kbingham@kernel.org>
Date: Mon, 12 Feb 2018 22:25:26 +0000
From: Kieran Bingham <kbingham@...nel.org>
To: linux-renesas-soc@...r.kernel.org,
Simon Horman <horms@...ge.net.au>,
Laurent Pinchart <laurent.pinchart@...asonboard.com>,
Kieran Bingham <kieran.bingham@...asonboard.com>
Cc: Kieran Bingham <kieran.bingham+renesas@...asonboard.com>,
Magnus Damm <magnus.damm@...il.com>,
Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Catalin Marinas <catalin.marinas@....com>,
Will Deacon <will.deacon@....com>,
devicetree@...r.kernel.org (open list:OPEN FIRMWARE AND FLATTENED
DEVICE TREE BINDINGS),
linux-arm-kernel@...ts.infradead.org (moderated list:ARM64 PORT
(AARCH64 ARCHITECTURE)), linux-kernel@...r.kernel.org (open list)
Subject: [PATCH 1/4] arm64: dts: renesas: r8a77995: add FCPVB node
From: Kieran Bingham <kieran.bingham+renesas@...asonboard.com>
The FCPVB handles the interface between the VSPB and memory.
Signed-off-by: Kieran Bingham <kieran.bingham+renesas@...asonboard.com>
---
arch/arm64/boot/dts/renesas/r8a77995.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
index cd3c6a30fc47..6cf935d307d9 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
@@ -691,6 +691,15 @@
#phy-cells = <0>;
status = "disabled";
};
+
+ fcpvb0: fcp@...6f000 {
+ compatible = "renesas,fcpv";
+ reg = <0 0xfe96f000 0 0x200>;
+ clocks = <&cpg CPG_MOD 607>;
+ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+ resets = <&cpg 607>;
+ iommus = <&ipmmu_vp0 5>;
+ };
};
timer {
--
2.7.4
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