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Date: Tue, 13 Feb 2018 14:31:48 +0200 From: Laurent Pinchart <laurent.pinchart@...asonboard.com> To: Kieran Bingham <kbingham@...nel.org> Cc: linux-renesas-soc@...r.kernel.org, Simon Horman <horms@...ge.net.au>, Kieran Bingham <kieran.bingham@...asonboard.com>, Kieran Bingham <kieran.bingham+renesas@...asonboard.com>, Magnus Damm <magnus.damm@...il.com>, Rob Herring <robh+dt@...nel.org>, Mark Rutland <mark.rutland@....com>, Catalin Marinas <catalin.marinas@....com>, Will Deacon <will.deacon@....com>, "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" <devicetree@...r.kernel.org>, "moderated list:ARM64 PORT (AARCH64 ARCHITECTURE)" <linux-arm-kernel@...ts.infradead.org>, open list <linux-kernel@...r.kernel.org> Subject: Re: [PATCH 1/4] arm64: dts: renesas: r8a77995: add FCPVB node Hi Kieran, Thank you for the patch. On Tuesday, 13 February 2018 00:25:26 EET Kieran Bingham wrote: > From: Kieran Bingham <kieran.bingham+renesas@...asonboard.com> > > The FCPVB handles the interface between the VSPB and memory. > > Signed-off-by: Kieran Bingham <kieran.bingham+renesas@...asonboard.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@...asonboard.com> > --- > arch/arm64/boot/dts/renesas/r8a77995.dtsi | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi > b/arch/arm64/boot/dts/renesas/r8a77995.dtsi index > cd3c6a30fc47..6cf935d307d9 100644 > --- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi > +++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi > @@ -691,6 +691,15 @@ > #phy-cells = <0>; > status = "disabled"; > }; > + > + fcpvb0: fcp@...6f000 { > + compatible = "renesas,fcpv"; > + reg = <0 0xfe96f000 0 0x200>; > + clocks = <&cpg CPG_MOD 607>; > + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; > + resets = <&cpg 607>; > + iommus = <&ipmmu_vp0 5>; > + }; > }; > > timer { -- Regards, Laurent Pinchart
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