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Message-Id: <43bd7f8f5379f2c63af9dc0672e19f0e4671d425.1518505425.git.greentime@andestech.com>
Date:   Tue, 13 Feb 2018 17:13:18 +0800
From:   Greentime Hu <green.hu@...il.com>
To:     greentime@...estech.com, linux-kernel@...r.kernel.org,
        arnd@...db.de, linux-arch@...r.kernel.org, tglx@...utronix.de,
        jason@...edaemon.net, marc.zyngier@....com, robh+dt@...nel.org,
        netdev@...r.kernel.org, deanbo422@...il.com,
        devicetree@...r.kernel.org, viro@...iv.linux.org.uk,
        dhowells@...hat.com, will.deacon@....com,
        daniel.lezcano@...aro.org, linux-serial@...r.kernel.org,
        geert.uytterhoeven@...il.com, linus.walleij@...aro.org,
        mark.rutland@....com, greg@...ah.com, ren_guo@...ky.com,
        rdunlap@...radead.org, davem@...emloft.net, jonas@...thpole.se,
        stefan.kristiansson@...nalahti.fi, shorne@...il.com
Cc:     Rick Chen <rickchen36@...il.com>, green.hu@...il.com,
        Vincent Chen <vincentc@...estech.com>
Subject: [PATCH v7 2/3] clocksource/drivers/atcpit100: VDSO support

From: Rick Chen <rickchen36@...il.com>

VDSO needs real-time cycle count to ensure the time accuracy.
Unlike others, nds32 architecture does not define clock source,
hence VDSO needs atcpit100 offering real-time cycle count
to derive the correct time.

Signed-off-by: Vincent Chen <vincentc@...estech.com>
Signed-off-by: Rick Chen <rickchen36@...il.com>
Signed-off-by: Greentime Hu <green.hu@...il.com>
---
 drivers/clocksource/timer-atcpit100.c | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/drivers/clocksource/timer-atcpit100.c b/drivers/clocksource/timer-atcpit100.c
index 2190096cffa3..5e23d7b4a722 100644
--- a/drivers/clocksource/timer-atcpit100.c
+++ b/drivers/clocksource/timer-atcpit100.c
@@ -18,6 +18,9 @@
 #include <linux/of_irq.h>
 #include <linux/of_platform.h>
 #include "timer-of.h"
+#ifdef CONFIG_NDS32
+#include <asm/vdso_timer_info.h>
+#endif
 
 /*
  * Definition of register offsets
@@ -204,6 +207,17 @@ static u64 notrace atcpit100_timer_sched_read(void)
 	return ~readl(timer_of_base(&to) + CH1_CNT);
 }
 
+#ifdef CONFIG_NDS32
+static void fill_vdso_need_info(struct device_node *node)
+{
+	struct resource timer_res;
+	of_address_to_resource(node, 0, &timer_res);
+	timer_info.mapping_base = (unsigned long)timer_res.start;
+	timer_info.cycle_count_down = true;
+	timer_info.cycle_count_reg_offset = CH1_CNT;
+}
+#endif
+
 static int __init atcpit100_timer_init(struct device_node *node)
 {
 	int ret;
@@ -242,6 +256,10 @@ static int __init atcpit100_timer_init(struct device_node *node)
 	val = readl(base + INT_EN);
 	writel(val | CH0INT0EN, base + INT_EN);
 
+#ifdef CONFIG_NDS32
+	fill_vdso_need_info(node);
+#endif
+
 	return ret;
 }
 
-- 
2.16.1

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