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Date:   Wed, 14 Feb 2018 05:04:20 -0800
From:   "tip-bot for Kirill A. Shutemov" <tipbot@...or.com>
To:     linux-tip-commits@...r.kernel.org
Cc:     torvalds@...ux-foundation.org, mingo@...nel.org,
        linux-kernel@...r.kernel.org, bp@...e.de, peterz@...radead.org,
        tglx@...utronix.de, luto@...capital.net,
        kirill.shutemov@...ux.intel.com, hpa@...or.com
Subject: [tip:x86/mm] x86/mm/64: Make __PHYSICAL_MASK_SHIFT always 52

Commit-ID:  b83ce5ee91471d19c403ff91227204fb37c95fb2
Gitweb:     https://git.kernel.org/tip/b83ce5ee91471d19c403ff91227204fb37c95fb2
Author:     Kirill A. Shutemov <kirill.shutemov@...ux.intel.com>
AuthorDate: Wed, 14 Feb 2018 14:16:48 +0300
Committer:  Ingo Molnar <mingo@...nel.org>
CommitDate: Wed, 14 Feb 2018 13:11:13 +0100

x86/mm/64: Make __PHYSICAL_MASK_SHIFT always 52

__PHYSICAL_MASK_SHIFT is used to define the mask that helps to extract
physical address from a page table entry.

Although real physical address space available may differ between
machines, it's safe to use 52 as __PHYSICAL_MASK_SHIFT. Unused bits
above log2(MAXPHYADDR) up to bit 51 are reserved and must be 0.

Signed-off-by: Kirill A. Shutemov <kirill.shutemov@...ux.intel.com>
Cc: Andy Lutomirski <luto@...capital.net>
Cc: Borislav Petkov <bp@...e.de>
Cc: Linus Torvalds <torvalds@...ux-foundation.org>
Cc: Peter Zijlstra <peterz@...radead.org>
Cc: Thomas Gleixner <tglx@...utronix.de>
Cc: linux-mm@...ck.org
Link: http://lkml.kernel.org/r/20180214111656.88514-2-kirill.shutemov@linux.intel.com
Signed-off-by: Ingo Molnar <mingo@...nel.org>
---
 arch/x86/include/asm/page_64_types.h | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/arch/x86/include/asm/page_64_types.h b/arch/x86/include/asm/page_64_types.h
index e140731..f68e652 100644
--- a/arch/x86/include/asm/page_64_types.h
+++ b/arch/x86/include/asm/page_64_types.h
@@ -52,11 +52,12 @@
 #define __START_KERNEL_map	_AC(0xffffffff80000000, UL)
 
 /* See Documentation/x86/x86_64/mm.txt for a description of the memory map. */
-#ifdef CONFIG_X86_5LEVEL
+
 #define __PHYSICAL_MASK_SHIFT	52
+
+#ifdef CONFIG_X86_5LEVEL
 #define __VIRTUAL_MASK_SHIFT	56
 #else
-#define __PHYSICAL_MASK_SHIFT	46
 #define __VIRTUAL_MASK_SHIFT	47
 #endif
 

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