linux-kernel - Re: [PATCH v3 4/8] MIPS: mscc: Add initial support for Microsemi MIPS SoCs

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20180214165135.GC3986@saruman>
Date:   Wed, 14 Feb 2018 16:51:35 +0000
From:   James Hogan <jhogan@...nel.org>
To:     Alexandre Belloni <alexandre.belloni@...e-electrons.com>
Cc:     Ralf Baechle <ralf@...ux-mips.org>, linux-mips@...ux-mips.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 4/8] MIPS: mscc: Add initial support for Microsemi
 MIPS SoCs

On Tue, Jan 16, 2018 at 11:12:36AM +0100, Alexandre Belloni wrote:
> diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
> index 350a990fc719..a9db028a0338 100644
> --- a/arch/mips/Kconfig
> +++ b/arch/mips/Kconfig
> @@ -527,6 +527,30 @@ config MIPS_MALTA
>  	  This enables support for the MIPS Technologies Malta evaluation
>  	  board.
>  
> +config MSCC_OCELOT
> +	bool "Microsemi Ocelot architecture"
> +	select BOOT_RAW
> +	select CEVT_R4K
> +	select CSRC_R4K
> +	select IRQ_MIPS_CPU
> +	select DMA_NONCOHERENT
> +	select SYS_HAS_CPU_MIPS32_R2
> +	select SYS_SUPPORTS_32BIT_KERNEL
> +	select SYS_SUPPORTS_BIG_ENDIAN
> +	select SYS_SUPPORTS_LITTLE_ENDIAN
> +	select SYS_HAS_EARLY_PRINTK
> +	select USE_GENERIC_EARLY_PRINTK_8250
> +	select MSCC_OCELOT_IRQ
> +	select PINCTRL
> +	select GPIOLIB
> +	select COMMON_CLK
> +	select USE_OF
> +	select BUILTIN_DTB
> +	select LIBFDT

Please sort alphanumerically.

> +	help
> +	  This enables support for the Microsemi Ocelot architecture.
> +	  It builds a generic DT-based kernel image.
> +
>  config MACH_PIC32
>  	bool "Microchip PIC32 Family"
>  	help

...

> diff --git a/arch/mips/mscc/Platform b/arch/mips/mscc/Platform
> new file mode 100644
> index 000000000000..9ae874c8f136
> --- /dev/null
> +++ b/arch/mips/mscc/Platform
> @@ -0,0 +1,12 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR MIT)
> +#
> +# Microsemi MIPS SoC support
> +#
> +# License: Dual MIT/GPL
> +# Copyright (c) 2017 Microsemi Corporation
> +
> +#
> +# Microsemi Ocelot board(s)
> +#
> +platform-$(CONFIG_MSCC_OCELOT) += mscc/

Please use tabs to align

> +load-$(CONFIG_MSCC_OCELOT)	 += 0x80100000

Please drop the space after the tab.

> diff --git a/arch/mips/mscc/setup.c b/arch/mips/mscc/setup.c
> new file mode 100644
> index 000000000000..77803edd7bfd
> --- /dev/null
> +++ b/arch/mips/mscc/setup.c
> @@ -0,0 +1,106 @@

...

> +
> +#include <asm/time.h>
> +#include <asm/idle.h>
> +#include <asm/prom.h>
> +#include <asm/reboot.h>

Please sort these includes alphanumerically if possible.

> +
> +static void __init ocelot_earlyprintk_init(void)
> +{
> +	void __iomem *uart_base;
> +
> +	uart_base = ioremap_nocache(0x70100000, 0x0f);

Maybe these hex literals (the address at least) can use #defines.

0xf is an odd size when the 2 below indicates 32-bit registers.


> +	setup_8250_early_printk_port((unsigned long)uart_base, 2, 50000);
> +}

...

> +extern void (*late_time_init)(void);

This is already declared in linux/init.h which you include, so I think
you can drop it.

> +void __init device_tree_init(void)
> +{
> +	if (!initial_boot_params)
> +		return;

I think flatten_and_copy_device_tree() already checks this (with a
warning), so this could be dropped.

Cheers
James

Download attachment "signature.asc" of type "application/pgp-signature" (834 bytes)