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Message-ID: <10373.1519084385@turing-police.cc.vt.edu>
Date: Mon, 19 Feb 2018 18:53:05 -0500
From: valdis.kletnieks@...edu
To: "Van De Ven, Arjan" <arjan.van.de.ven@...el.com>
Cc: Jon Masters <jcm@...masters.org>,
David Woodhouse <dwmw2@...radead.org>,
Paolo Bonzini <pbonzini@...hat.com>,
"tglx@...utronix.de" <tglx@...utronix.de>,
"x86@...nel.org" <x86@...nel.org>,
"kvm@...r.kernel.org" <kvm@...r.kernel.org>,
"torvalds@...ux-foundation.org" <torvalds@...ux-foundation.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"Hansen, Dave" <dave.hansen@...el.com>,
Ingo Molnar <mingo@...nel.org>
Subject: Re: [PATCH 2/2] x86/speculation: Support "Enhanced IBRS" on future CPUs
On Mon, 19 Feb 2018 23:42:24 +0000, "Van De Ven, Arjan" said:
> the guest is not the problem; guests obviously will already honor if Enhanced
> IBRS is enumerated. The problem is mixed migration pools where the hypervisor
> may need to decide to not pass this enumeration through to the guest.
For bonus points: What should happen to a VM that is live migrated from one
hypervisor to another, and the hypervisors have different IBRS support?
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