[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <1519393259-26108-2-git-send-email-jacopo+renesas@jmondi.org>
Date: Fri, 23 Feb 2018 14:40:53 +0100
From: Jacopo Mondi <jacopo+renesas@...ndi.org>
To: arnd@...db.de, geert@...ux-m68k.org, horms@...ge.net.au,
magnus.damm@...il.com, robh+dt@...nel.org, mark.rutland@....com
Cc: Jacopo Mondi <jacopo+renesas@...ndi.org>,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-renesas-soc@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: [PATCH v2 1/7] arm64: dts: renesas: r8a77965: Add "reg" properties
Add "reg" properties to place-holder nodes with unit address defined for
R-Car M3-N SoC.
This silences the following DTC compiler warning:
Warning (unit_address_vs_reg): Node /soc/... has a unit name,
but no reg property
Signed-off-by: Jacopo Mondi <jacopo+renesas@...ndi.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@...der.be>
---
v1 -> v2:
- Extend "du" address length to include third channel
---
arch/arm64/boot/dts/renesas/r8a77965.dtsi | 51 +++++++++++++++++++++++++++++++
1 file changed, 51 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
index 55f05f7..4286453 100644
--- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
@@ -317,6 +317,7 @@
};
intc_ex: interrupt-controller@...c0000 {
+ reg = <0 0xe61c0000 0 0x200>;
/* placeholder */
};
@@ -520,130 +521,163 @@
};
avb: ethernet@...00000 {
+ reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
/* placeholder */
};
csi20: csi2@...80000 {
+ reg = <0 0xfea80000 0 0x10000>;
/* placeholder */
};
csi40: csi2@...a0000 {
+ reg = <0 0xfeaa0000 0 0x10000>;
/* placeholder */
};
vin0: video@...f0000 {
+ reg = <0 0xe6ef0000 0 0x1000>;
/* placeholder */
};
vin1: video@...f1000 {
+ reg = <0 0xe6ef1000 0 0x1000>;
/* placeholder */
};
vin2: video@...f2000 {
+ reg = <0 0xe6ef2000 0 0x1000>;
/* placeholder */
};
vin3: video@...f3000 {
+ reg = <0 0xe6ef3000 0 0x1000>;
/* placeholder */
};
vin4: video@...f4000 {
+ reg = <0 0xe6ef4000 0 0x1000>;
/* placeholder */
};
vin5: video@...f5000 {
+ reg = <0 0xe6ef5000 0 0x1000>;
/* placeholder */
};
vin6: video@...f6000 {
+ reg = <0 0xe6ef6000 0 0x1000>;
/* placeholder */
};
vin7: video@...f7000 {
+ reg = <0 0xe6ef7000 0 0x1000>;
/* placeholder */
};
ohci0: usb@...80000 {
+ reg = <0 0xee080000 0 0x100>;
/* placeholder */
};
ehci0: usb@...80100 {
+ reg = <0 0xee080100 0 0x100>;
/* placeholder */
};
usb2_phy0: usb-phy@...80200 {
+ reg = <0 0xee080200 0 0x700>;
/* placeholder */
};
ohci1: usb@...a0000 {
+ reg = <0 0xee0a0000 0 0x100>;
/* placeholder */
};
ehci1: usb@...a0100 {
+ reg = <0 0xee0a0100 0 0x100>;
/* placeholder */
};
i2c0: i2c@...00000 {
+ reg = <0 0xe6500000 0 0x40>;
/* placeholder */
};
i2c1: i2c@...08000 {
+ reg = <0 0xe6508000 0 0x40>;
/* placeholder */
};
i2c2: i2c@...10000 {
+ reg = <0 0xe6510000 0 0x40>;
/* placeholder */
};
i2c3: i2c@...d0000 {
+ reg = <0 0xe66d0000 0 0x40>;
/* placeholder */
};
i2c4: i2c@...d8000 {
+ reg = <0 0xe66d8000 0 0x40>;
/* placeholder */
};
i2c5: i2c@...e0000 {
+ reg = <0 0xe66e0000 0 0x40>;
/* placeholder */
};
i2c6: i2c@...e8000 {
+ reg = <0 0xe66e8000 0 0x40>;
/* placeholder */
};
i2c_dvfs: i2c@...b0000 {
+ reg = <0 0xe60b0000 0 0x425>;
/* placeholder */
};
pwm0: pwm@...30000 {
+ reg = <0 0xe6e30000 0 8>;
/* placeholder */
};
pwm1: pwm@...31000 {
+ reg = <0 0xe6e31000 0 8>;
/* placeholder */
};
pwm2: pwm@...32000 {
+ reg = <0 0xe6e32000 0 8>;
/* placeholder */
};
pwm3: pwm@...33000 {
+ reg = <0 0xe6e33000 0 8>;
/* placeholder */
};
pwm4: pwm@...34000 {
+ reg = <0 0xe6e34000 0 8>;
/* placeholder */
};
pwm5: pwm@...35000 {
+ reg = <0 0xe6e35000 0 8>;
/* placeholder */
};
pwm6: pwm@...36000 {
+ reg = <0 0xe6e36000 0 8>;
/* placeholder */
};
du: display@...00000 {
+ reg = <0 0xfeb00000 0 0x80000>,
+ <0 0xfeb90000 0 0x14>;
/* placeholder */
ports {
@@ -666,18 +700,26 @@
};
hsusb: usb@...90000 {
+ reg = <0 0xe6590000 0 0x100>;
/* placeholder */
};
pciec0: pcie@...00000 {
+ reg = <0 0xfe000000 0 0x80000>;
/* placeholder */
};
pciec1: pcie@...00000 {
+ reg = <0 0xee800000 0 0x80000>;
/* placeholder */
};
rcar_sound: sound@...00000 {
+ reg = <0 0xec500000 0 0x1000>, /* SCU */
+ <0 0xec5a0000 0 0x100>, /* ADG */
+ <0 0xec540000 0 0x1000>, /* SSIU */
+ <0 0xec541000 0 0x280>, /* SSI */
+ <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
/* placeholder */
rcar_sound,dvc {
@@ -703,38 +745,47 @@
};
usb2_phy1: usb-phy@...a0200 {
+ reg = <0 0xee0a0200 0 0x700>;
/* placeholder */
};
sdhi0: sd@...00000 {
+ reg = <0 0xee100000 0 0x2000>;
/* placeholder */
};
sdhi1: sd@...20000 {
+ reg = <0 0xee120000 0 0x2000>;
/* placeholder */
};
sdhi2: sd@...40000 {
+ reg = <0 0xee140000 0 0x2000>;
/* placeholder */
};
sdhi3: sd@...60000 {
+ reg = <0 0xee160000 0 0x2000>;
/* placeholder */
};
usb3_phy0: usb-phy@...ee000 {
+ reg = <0 0xe65ee000 0 0x90>;
/* placeholder */
};
usb3_peri0: usb@...20000 {
+ reg = <0 0xee020000 0 0x400>;
/* placeholder */
};
xhci0: usb@...00000 {
+ reg = <0 0xee000000 0 0xc00>;
/* placeholder */
};
wdt0: watchdog@...20000 {
+ reg = <0 0xe6020000 0 0x0c>;
/* placeholder */
};
};
--
2.7.4
Powered by blists - more mailing lists