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Message-ID: <e3ca6482-d68c-0e10-dde9-7ccb702d3ac2@deltatee.com>
Date: Mon, 5 Mar 2018 13:13:20 -0700
From: Logan Gunthorpe <logang@...tatee.com>
To: Sagi Grimberg <sagi@...mberg.me>,
Keith Busch <keith.busch@...el.com>, Oliver <oohall@...il.com>
Cc: Jens Axboe <axboe@...nel.dk>,
"linux-nvdimm@...ts.01.org" <linux-nvdimm@...ts.01.org>,
linux-rdma@...r.kernel.org, linux-pci@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-nvme@...ts.infradead.org,
linux-block@...r.kernel.org,
Alex Williamson <alex.williamson@...hat.com>,
Jason Gunthorpe <jgg@...lanox.com>,
Jérôme Glisse <jglisse@...hat.com>,
Benjamin Herrenschmidt <benh@...nel.crashing.org>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Max Gurtovoy <maxg@...lanox.com>,
Christoph Hellwig <hch@....de>
Subject: Re: [PATCH v2 07/10] nvme-pci: Use PCI p2pmem subsystem to manage the
CMB
On 05/03/18 12:57 PM, Sagi Grimberg wrote:
> Keith, while we're on this, regardless of cmb, is SQE memcopy and DB
> update ordering always guaranteed?
>
> If you look at mlx4 (rdma device driver) that works exactly the same as
> nvme you will find:
> --
> qp->sq.head += nreq;
>
> /*
> * Make sure that descriptors are written before
> * doorbell record.
> */
> wmb();
>
> writel(qp->doorbell_qpn,
> to_mdev(ibqp->device)->uar_map +
> MLX4_SEND_DOORBELL);
>
> /*
> * Make sure doorbells don't leak out of SQ spinlock
> * and reach the HCA out of order.
> */
> mmiowb();
> --
To me, it looks like the wmb() is redundant as writel should guarantee
the order. (Indeed, per Sinan's comment, writel on arm64 starts with a
wmb() which means, on that platform, there are two wmb() calls in a row.)
The mmiowb() call, on the other hand, looks correct per my understanding
of it's purpose with respect to the spinlock.
Logan
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