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Message-ID: <608840df-85a6-6d3b-70b4-43b037db58c9@deltatee.com>
Date: Mon, 5 Mar 2018 13:16:52 -0700
From: Logan Gunthorpe <logang@...tatee.com>
To: Jason Gunthorpe <jgg@...lanox.com>,
Sagi Grimberg <sagi@...mberg.me>
Cc: Jens Axboe <axboe@...nel.dk>, linux-block@...r.kernel.org,
Benjamin Herrenschmidt <benh@...nel.crashing.org>,
"linux-nvdimm@...ts.01.org" <linux-nvdimm@...ts.01.org>,
linux-rdma@...r.kernel.org, linux-pci@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-nvme@...ts.infradead.org,
Keith Busch <keith.busch@...el.com>,
Alex Williamson <alex.williamson@...hat.com>,
Jérôme Glisse <jglisse@...hat.com>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Max Gurtovoy <maxg@...lanox.com>,
Christoph Hellwig <hch@....de>
Subject: Re: [PATCH v2 07/10] nvme-pci: Use PCI p2pmem subsystem to manage the
CMB
On 05/03/18 01:10 PM, Jason Gunthorpe wrote:
> So when reading the above mlx code, we see the first wmb() being used
> to ensure that CPU stores to cachable memory are visible to the DMA
> triggered by the doorbell ring.
Oh, yes, that makes sense. Disregard my previous email as I was wrong.
Logan
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