linux-kernel - [tip:x86/mm] x86/cpufeatures: Add Intel Total Memory Encryption cpufeature

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Message-ID: <tip-1da961d72ab0cfbe8b7c26cba731dc2bb6b9494b@git.kernel.org>
Date:   Mon, 12 Mar 2018 05:20:50 -0700
From:   "tip-bot for Kirill A. Shutemov" <tipbot@...or.com>
To:     linux-tip-commits@...r.kernel.org
Cc:     peterz@...radead.org, kai.huang@...ux.intel.com,
        thomas.lendacky@....com, mingo@...nel.org, dave.hansen@...el.com,
        torvalds@...ux-foundation.org, kirill.shutemov@...ux.intel.com,
        tglx@...utronix.de, linux-kernel@...r.kernel.org, hpa@...or.com
Subject: [tip:x86/mm] x86/cpufeatures: Add Intel Total Memory Encryption
 cpufeature

Commit-ID:  1da961d72ab0cfbe8b7c26cba731dc2bb6b9494b
Gitweb:     https://git.kernel.org/tip/1da961d72ab0cfbe8b7c26cba731dc2bb6b9494b
Author:     Kirill A. Shutemov <kirill.shutemov@...ux.intel.com>
AuthorDate: Mon, 5 Mar 2018 19:25:49 +0300
Committer:  Ingo Molnar <mingo@...nel.org>
CommitDate: Mon, 12 Mar 2018 12:09:53 +0100

x86/cpufeatures: Add Intel Total Memory Encryption cpufeature

CPUID.0x7.0x0:ECX[13] indicates whether CPU supports Intel Total Memory
Encryption.

Signed-off-by: Kirill A. Shutemov <kirill.shutemov@...ux.intel.com>
Cc: Dave Hansen <dave.hansen@...el.com>
Cc: Kai Huang <kai.huang@...ux.intel.com>
Cc: Linus Torvalds <torvalds@...ux-foundation.org>
Cc: Peter Zijlstra <peterz@...radead.org>
Cc: Thomas Gleixner <tglx@...utronix.de>
Cc: Tom Lendacky <thomas.lendacky@....com>
Cc: linux-mm@...ck.org
Link: http://lkml.kernel.org/r/20180305162610.37510-2-kirill.shutemov@linux.intel.com
Signed-off-by: Ingo Molnar <mingo@...nel.org>
---
 arch/x86/include/asm/cpufeatures.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index f41079da38c5..16898eb813f5 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -316,6 +316,7 @@
 #define X86_FEATURE_VPCLMULQDQ		(16*32+10) /* Carry-Less Multiplication Double Quadword */
 #define X86_FEATURE_AVX512_VNNI		(16*32+11) /* Vector Neural Network Instructions */
 #define X86_FEATURE_AVX512_BITALG	(16*32+12) /* Support for VPOPCNT[B,W] and VPSHUF-BITQMB instructions */
+#define X86_FEATURE_TME			(16*32+13) /* Intel Total Memory Encryption */
 #define X86_FEATURE_AVX512_VPOPCNTDQ	(16*32+14) /* POPCNT for vectors of DW/QW */
 #define X86_FEATURE_LA57		(16*32+16) /* 5-level page tables */
 #define X86_FEATURE_RDPID		(16*32+22) /* RDPID instruction */