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Message-ID: <f452e41a-533f-60d5-2e19-9bdbcdc16396@linux.intel.com>
Date: Tue, 13 Mar 2018 13:42:55 -0400
From: "Liang, Kan" <kan.liang@...ux.intel.com>
To: Andy Shevchenko <andy.shevchenko@...il.com>
Cc: "Kroening, Gary" <gary.kroening@....com>,
"mingo@...hat.com" <mingo@...hat.com>,
"hpa@...or.com" <hpa@...or.com>,
"tglx@...utronix.de" <tglx@...utronix.de>,
"peterz@...radead.org" <peterz@...radead.org>,
"Travis, Mike" <mike.travis@....com>,
"Banman, Andrew" <abanman@....com>,
"Sivanich, Dimitri" <dimitri.sivanich@....com>,
"Anderson, Russ" <russ.anderson@....com>,
"x86@...nel.org" <x86@...nel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 1/1] x86/platform/x86: Fix count of CHas on
multi-pci-segment arches
On 3/13/2018 1:16 PM, Liang, Kan wrote:
>
>
> On 3/13/2018 11:58 AM, Andy Shevchenko wrote:
>> On Tue, Mar 13, 2018 at 3:42 AM, Liang, Kan
>> <kan.liang@...ux.intel.com> wrote:
>>
>>> +#define SKX_CAPID6 0x9c
>>> +#define SKX_CHA_BIT_WIDTH 28
>>> +
>>> static int skx_count_chabox(void)
>>> {
>>> + struct pci_dev *dev = NULL;
>>> + u32 val = 0;
>>>
>>
>>> + dev = pci_get_device(PCI_VENDOR_ID_INTEL, 0x2083, dev);
>>> + if (!dev)
>>> + return 0;
>>
>> Where is pci_dev_put()?
>>
>>>
>>> + pci_read_config_dword(dev, SKX_CAPID6, &val);
>>> + return bitmap_weight((unsigned long *)&val, SKX_CHA_BIT_WIDTH);
>>
>> UB is here.
>> Fix is simple, use unsigned long and drop this ugly casting.
>>
Just noticed that we have to do casting anyway.
pci_read_config_dword uses u32.
bitmap_weight uses unsigned long.
Thanks,
Kan
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