linux-kernel - Re: [PATCH v7 3/3] dts: arm64: Add mailbox binding for hi3660

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-ID: <20180315234440.GA18160@leoy-ThinkPad-X240s>
Date:   Fri, 16 Mar 2018 07:44:40 +0800
From:   Leo Yan <leo.yan@...aro.org>
To:     Wei Xu <xuwei5@...ilicon.com>
Cc:     Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Jassi Brar <jassisinghbrar@...il.com>,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org,
        Kaihua Zhong <zhongkaihua@...wei.com>,
        Guodong Xu <guodong.xu@...aro.org>,
        Haojian Zhuang <haojian.zhuang@...aro.org>,
        Ruyi Wang <wangruyi@...wei.com>
Subject: Re: [PATCH v7 3/3] dts: arm64: Add mailbox binding for hi3660

On Thu, Mar 15, 2018 at 04:41:18PM +0000, Wei Xu wrote:
> Hi Leo,
> 
> On 2018/3/15 16:07, Leo Yan wrote:
> > From: Kaihua Zhong <zhongkaihua@...wei.com>
> > 
> > Add DT binding for mailbox driver.
> > 
> > Signed-off-by: Ruyi Wang <wangruyi@...wei.com>
> > Signed-off-by: Kaihua Zhong <zhongkaihua@...wei.com>
> 
> Fine to me. Thanks!
> Acked-by: Wei Xu <xuwei5@...ilicon.com>

Thanks, Wei.

> Best Regards,
> Wei
> 
> > ---
> >  arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 8 ++++++++
> >  1 file changed, 8 insertions(+)
> > 
> > diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
> > index 63d4f9d..3788448 100644
> > --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
> > +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
> > @@ -298,6 +298,14 @@
> >  			#reset-cells = <2>;
> >  		};
> >  
> > +		mailbox: mailbox@...6b000 {
> > +			compatible = "hisilicon,hi3660-mbox";
> > +			reg = <0x0 0xe896b000 0x0 0x1000>;
> > +			interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>,
> > +				     <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
> > +			#mbox-cells = <3>;
> > +		};
> > +
> >  		dual_timer0: timer@...14000 {
> >  			compatible = "arm,sp804", "arm,primecell";
> >  			reg = <0x0 0xfff14000 0x0 0x1000>;
> > 
>