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Message-ID: <71e37a55-537b-d75a-cfde-f188b7cfce8e@codeaurora.org>
Date: Sat, 17 Mar 2018 00:03:05 -0400
From: Sinan Kaya <okaya@...eaurora.org>
To: Steve Wise <swise@...ngridcomputing.com>, netdev@...r.kernel.org,
timur@...eaurora.org, sulrich@...eaurora.org
Cc: linux-arm-msm@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
'Steve Wise' <swise@...lsio.com>,
'Doug Ledford' <dledford@...hat.com>,
'Jason Gunthorpe' <jgg@...pe.ca>, linux-rdma@...r.kernel.org,
linux-kernel@...r.kernel.org,
'Michael Werner' <werner@...lsio.com>,
'Casey Leedom' <leedom@...lsio.com>
Subject: Re: [PATCH v3 18/18] infiniband: cxgb4: Eliminate duplicate barriers
on weakly-ordered archs
On 3/16/2018 11:40 PM, Sinan Kaya wrote:
> I'll change writel_relaxed() with __raw_writel() in the series like you suggested
> and also look at your other comments.
I spoke too soon.
Now that I realized, code needs to follow one of the following patterns for correctness
1)
wmb()
writel()/writel_relaxed()
or
2)
wmb()
__raw_wrltel()
mmiowb()
but definitely not
wmb()
__raw_wrltel()
Since #1 == #2, I'll stick to my current implementation of writel_relaxed()
Changing writel() to writel_relaxed() or __raw_writel() isn't enough. PowerPC needs mmiowb()
for correctness. ARM's mmiowb() implementation is empty.
So, there is no one size fits all solution with the current state of affairs.
--
Sinan Kaya
Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm Technologies, Inc.
Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project.
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