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Message-ID: <b327cb67-562c-8b95-b31b-96594d6a41ae@codeaurora.org>
Date: Fri, 16 Mar 2018 23:08:16 -0500
From: Timur Tabi <timur@...eaurora.org>
To: Steve Wise <swise@...ngridcomputing.com>,
'Jason Gunthorpe' <jgg@...pe.ca>,
"linuxppc-dev@...ts.ozlabs.org" <linuxppc-dev@...ts.ozlabs.org>
Cc: 'Sinan Kaya' <okaya@...eaurora.org>, netdev@...r.kernel.org,
sulrich@...eaurora.org, linux-arm-msm@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
'Steve Wise' <swise@...lsio.com>,
'Doug Ledford' <dledford@...hat.com>,
linux-rdma@...r.kernel.org, linux-kernel@...r.kernel.org,
'Michael Werner' <werner@...lsio.com>,
'Casey Leedom' <leedom@...lsio.com>
Subject: Re: [PATCH v3 18/18] infiniband: cxgb4: Eliminate duplicate barriers
on weakly-ordered archs
On 3/16/18 6:04 PM, Steve Wise wrote:
> Anybody understand why the PPC implementation of writeX_relaxed() isn't
> relaxed?
You probably should ask that on the linuxppc-dev@...ts.ozlabs.org
mailing list.
I've always wondered why PowerPC has non-standard I/O accessors.
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