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Message-ID: <1523351850.11062.80.camel@kernel.crashing.org>
Date: Tue, 10 Apr 2018 19:17:30 +1000
From: Benjamin Herrenschmidt <benh@...nel.crashing.org>
To: Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Arnd Bergmann <arnd@...db.de>
Cc: "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Andrew Jeffery <andrew@...id.au>,
Joel Stanley <joel.stanley@....ibm.com>,
Jeremy Kerr <jeremy.kerr@....ibm.com>
Subject: How to expose various BMC chip controls ?
Hi Folks !
I would like to discuss something we need to solve for BMC chips before
we start implementing a solution that you'll reject upstream :-)
So quick recap: the BMC chip is the management controller of your
server, typically some kind of specialized ARM SoC which controls a
variety of things ranging from power supply, fans, inventory, flash, to
having even a built-in GPU connected to the main server processor via
PCIe etc...
As part of the OpenBMC project, we have been contributing (along with
others from Google etc...) a bunch of upstream drivers to support the
BMC chips from Aspeed which are quite popular. There's work in progress
to also upstream other vendor(s) chip support.
For most things, we can write appropriate drivers.
However, there's a range of things for which there is no good fit for
dedicated per-function kernel drivers in the BMC:
The BMC chips have a variety of control bits and pieces (registers)
that affect the host in all sorts of ways. A few semi-random examples:
- Scratch registers that the host BIOS can read via LPC that contain
system specific details of interest to the BIOS itself. The
content/format is specific to a given BIOS <-> BMC userspace pair.
- Similar ones related to the built-in VGA (the one the host sees on
PCIe, it doesn't appear as a device on the BMC side). Used to pass some
wiring information to the VGA BIOS and the Linux driver among others.
- Bits controlling which parts of the BMC the host can access remotely
via either LPC or PCIe. (Visibility of the VGA to the host, of the BMC
PCIe system-controller device, opening of various windows from the host
into the BMC address space etc...)
- ... and a few more
Those things tend to be fairly system specific. Meaning that what's
written in them (or read from them) and when it's written in these
registers should be under userspace control on the BMC. There isn't
necessarily many registers that need to be exposed that way, here too,
which specific ones is rather system specific.
But /dev/mem isn't a solution :-)
So one simple idea I had, you tell me if it can fly, is to have some
driver for the SoC as a whole (thinking of syscon here...) expose a
selection of these things via sysfs.
The list being potentially system specific, it would be provided to
the kernel via the device-tree (binding tbd) where we would effectively
provide a list of names, register offset, start bit, bitfield size.
Any better idea ? It's a fairly simple problem, and the above solution
would be very little code, but I just don't want us to go down a rabbit
hole if some of you have religious objections to some of it :)
Cheers,
Ben.
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