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Message-ID: <e38a329dfb9c461ab3e91de7b96db3dc@AcuMS.aculab.com>
Date:   Fri, 13 Apr 2018 15:41:00 +0000
From:   David Laight <David.Laight@...LAB.COM>
To:     'James Hogan' <jhogan@...nel.org>,
        Sinan Kaya <okaya@...eaurora.org>
CC:     "linux-mips@...ux-mips.org" <linux-mips@...ux-mips.org>,
        "arnd@...db.de" <arnd@...db.de>,
        "timur@...eaurora.org" <timur@...eaurora.org>,
        "sulrich@...eaurora.org" <sulrich@...eaurora.org>,
        "linux-arm-msm@...r.kernel.org" <linux-arm-msm@...r.kernel.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        Ralf Baechle <ralf@...ux-mips.org>,
        Paul Burton <paul.burton@...s.com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: RE: [PATCH v3 2/2] MIPS: io: add a barrier after register read in
 readX()

From: James Hogan
> Sent: 12 April 2018 22:52
> On Tue, Apr 03, 2018 at 08:55:04AM -0400, Sinan Kaya wrote:
> > While a barrier is present in writeX() function before the register write,
> > a similar barrier is missing in the readX() function after the register
> > read. This could allow memory accesses following readX() to observe
> > stale data.
> >
> > Signed-off-by: Sinan Kaya <okaya@...eaurora.org>
> > Reported-by: Arnd Bergmann <arnd@...db.de>
> 
> Both patches look like obvious improvements to me, so I'm happy to apply
> to my fixes branch.

Don't you also need at least barrier() between the register write in writeX()
and the register read in readX()?
On ppc you probably need eieio.
Or are drivers expected to insert that one?
If they need to insert that one then why not all the others??

	David

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