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Message-Id: <1523969291-41756-1-git-send-email-michel.pollet@bp.renesas.com>
Date:   Tue, 17 Apr 2018 13:47:59 +0100
From:   Michel Pollet <michel.pollet@...renesas.com>
To:     linux-renesas-soc@...r.kernel.org,
        Simon Horman <horms@...ge.net.au>
Cc:     phil.edworthy@...esas.com,
        Michel Pollet <buserror+upstream@...il.com>,
        Michel Pollet <michel.pollet@...renesas.com>,
        Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Magnus Damm <magnus.damm@...il.com>,
        Russell King <linux@...linux.org.uk>,
        Florian Fainelli <f.fainelli@...il.com>,
        Frank Rowand <frank.rowand@...y.com>,
        Maxime Ripard <maxime.ripard@...tlin.com>,
        Andreas Färber <afaerber@...e.de>,
        Chen-Yu Tsai <wens@...e.org>,
        Rajendra Nayak <rnayak@...eaurora.org>,
        Juri Lelli <juri.lelli@....com>,
        Carlo Caione <carlo@...lessm.com>, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org
Subject: [PATCH v2 0/3] Renesas RZ/N1D SMP enabler

*WARNING -- this requires the base RZ/N1 base patches (v5) already posted

This patch series is for enabling the second CA7 of the RZ/N1D.
It's based on a spin_table method, and it reuses the same binding
property as that driver.

v2:
  + Added suggestions from Florian Fainelli
  + Use __pa_symbol()
  + Simplified logic in prepare_cpu()
  + Reordered the patches
  + Rebased on RZN1 Base patch v5

*** BLURB HERE ***

Michel Pollet (3):
  dt-bindings: cpu: Add Renesas RZ/N1D SMP enable method.
  arm: shmobile: Add the RZ/N1D SMP enabler driver
  ARM: dts: Renesas RZ/N1D SMP enable method

 Documentation/devicetree/bindings/arm/cpus.txt |  1 +
 arch/arm/boot/dts/r9a06g032.dtsi               |  2 +
 arch/arm/mach-shmobile/Makefile                |  1 +
 arch/arm/mach-shmobile/smp-r9a06g032.c         | 85 ++++++++++++++++++++++++++
 4 files changed, 89 insertions(+)
 create mode 100644 arch/arm/mach-shmobile/smp-r9a06g032.c

-- 
2.7.4

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