linux-kernel - [PATCH v2 1/3] dt-bindings: cpu: Add Renesas RZ/N1D SMP enable method.

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Message-Id: <1523969291-41756-2-git-send-email-michel.pollet@bp.renesas.com>
Date:   Tue, 17 Apr 2018 13:48:00 +0100
From:   Michel Pollet <michel.pollet@...renesas.com>
To:     linux-renesas-soc@...r.kernel.org,
        Simon Horman <horms@...ge.net.au>
Cc:     phil.edworthy@...esas.com,
        Michel Pollet <buserror+upstream@...il.com>,
        Michel Pollet <michel.pollet@...renesas.com>,
        Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Magnus Damm <magnus.damm@...il.com>,
        Russell King <linux@...linux.org.uk>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Frank Rowand <frank.rowand@...y.com>,
        Kevin Hilman <khilman@...libre.com>,
        Stefan Wahren <stefan.wahren@...e.com>,
        Andreas Färber <afaerber@...e.de>,
        Carlo Caione <carlo@...lessm.com>,
        Chen-Yu Tsai <wens@...e.org>, Juri Lelli <juri.lelli@....com>,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org
Subject: [PATCH v2 1/3] dt-bindings: cpu: Add Renesas RZ/N1D SMP enable method.

Add a special enable method for second CA8 of the Renesas RZ/N1D
(R9A06G032).

Signed-off-by: Michel Pollet <michel.pollet@...renesas.com>
Reviewed-by: Rob Herring <robh@...nel.org>
---
 Documentation/devicetree/bindings/arm/cpus.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt
index 29e1dc5..b395d107 100644
--- a/Documentation/devicetree/bindings/arm/cpus.txt
+++ b/Documentation/devicetree/bindings/arm/cpus.txt
@@ -219,6 +219,7 @@ described below.
 			    "qcom,kpss-acc-v1"
 			    "qcom,kpss-acc-v2"
 			    "renesas,apmu"
+			    "renesas,r9a06g032-smp"
 			    "rockchip,rk3036-smp"
 			    "rockchip,rk3066-smp"
 			    "ste,dbx500-smp"
-- 
2.7.4