[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <4548140.Ekiqv10gLa@avalon>
Date: Fri, 27 Apr 2018 00:06:27 +0300
From: Laurent Pinchart <laurent.pinchart@...asonboard.com>
To: Kieran Bingham <kieran.bingham+renesas@...asonboard.com>
Cc: linux-renesas-soc@...r.kernel.org,
Takeshi Kihara <takeshi.kihara.df@...esas.com>,
Simon Horman <horms@...ge.net.au>,
Magnus Damm <magnus.damm@...il.com>,
Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Catalin Marinas <catalin.marinas@....com>,
Will Deacon <will.deacon@....com>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>,
"moderated list:ARM64 PORT (AARCH64 ARCHITECTURE)"
<linux-arm-kernel@...ts.infradead.org>,
open list <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 10/17] arm64: dts: r8a77965: Add FCPF and FCPV instances
Hi Kieran,
Thank you for the patch.
On Thursday, 26 April 2018 19:53:39 EEST Kieran Bingham wrote:
> The FCPs handle the interface between various IP cores and memory. Add
> the instances related to the FDPs and VSP2s.
>
> Based on a similar patch of the R8A7796 device tree
> by Laurent Pinchart <laurent.pinchart+renesas@...asonboard.com>.
>
> Signed-off-by: Takeshi Kihara <takeshi.kihara.df@...esas.com>
> [Kieran: Rebase to top of tree]
> Signed-off-by: Kieran Bingham <kieran.bingham+renesas@...asonboard.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@...asonboard.com>
> ---
> arch/arm64/boot/dts/renesas/r8a77965.dtsi | 40 +++++++++++++++++++++++
> 1 file changed, 40 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
> b/arch/arm64/boot/dts/renesas/r8a77965.dtsi index
> 894903a59bdc..1f44ed7c1b1c 100644
> --- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
> @@ -1001,6 +1001,46 @@
> /* placeholder */
> };
>
> + fcpf0: fcp@...50000 {
> + compatible = "renesas,fcpf";
> + reg = <0 0xfe950000 0 0x200>;
> + clocks = <&cpg CPG_MOD 615>;
> + power-domains = <&sysc R8A77965_PD_A3VP>;
> + resets = <&cpg 615>;
> + };
> +
> + fcpvb0: fcp@...6f000 {
> + compatible = "renesas,fcpv";
> + reg = <0 0xfe96f000 0 0x200>;
> + clocks = <&cpg CPG_MOD 607>;
> + power-domains = <&sysc R8A77965_PD_A3VP>;
> + resets = <&cpg 607>;
> + };
> +
> + fcpvi0: fcp@...af000 {
> + compatible = "renesas,fcpv";
> + reg = <0 0xfe9af000 0 0x200>;
> + clocks = <&cpg CPG_MOD 611>;
> + power-domains = <&sysc R8A77965_PD_A3VP>;
> + resets = <&cpg 611>;
> + };
> +
> + fcpvd0: fcp@...27000 {
> + compatible = "renesas,fcpv";
> + reg = <0 0xfea27000 0 0x200>;
> + clocks = <&cpg CPG_MOD 603>;
> + power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
> + resets = <&cpg 603>;
> + };
> +
> + fcpvd1: fcp@...2f000 {
> + compatible = "renesas,fcpv";
> + reg = <0 0xfea2f000 0 0x200>;
> + clocks = <&cpg CPG_MOD 602>;
> + power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
> + resets = <&cpg 602>;
> + };
> +
> csi20: csi2@...80000 {
> reg = <0 0xfea80000 0 0x10000>;
> /* placeholder */
--
Regards,
Laurent Pinchart
Powered by blists - more mailing lists