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Message-ID: <4644695.5hyXcXK7su@avalon>
Date:   Fri, 27 Apr 2018 00:16:27 +0300
From:   Laurent Pinchart <laurent.pinchart@...asonboard.com>
To:     Kieran Bingham <kieran.bingham+renesas@...asonboard.com>
Cc:     linux-renesas-soc@...r.kernel.org,
        Simon Horman <horms@...ge.net.au>,
        Magnus Damm <magnus.damm@...il.com>,
        Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Catalin Marinas <catalin.marinas@....com>,
        Will Deacon <will.deacon@....com>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@...r.kernel.org>,
        "moderated list:ARM64 PORT (AARCH64 ARCHITECTURE)" 
        <linux-arm-kernel@...ts.infradead.org>,
        open list <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 09/17] arm64: dts: r8a77965: Use the correct CPG header

Hi Kieran,

Thank you for the patch.

On Thursday, 26 April 2018 19:53:38 EEST Kieran Bingham wrote:
> The SoC dtsi includes the generic renesas-cpg-mssr header, which does
> not contain all of the relevant SoC specific definitions.
> 
> Adapt this to be the r8a77965 specific header.

I would squash this with patch 13/17.

> Signed-off-by: Kieran Bingham <kieran.bingham+renesas@...asonboard.com>
> ---
>  arch/arm64/boot/dts/renesas/r8a77965.dtsi | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
> b/arch/arm64/boot/dts/renesas/r8a77965.dtsi index
> 02de36b9e581..894903a59bdc 100644
> --- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
> @@ -8,7 +8,7 @@
>   * Copyright (C) 2016 Renesas Electronics Corp.
>   */
> 
> -#include <dt-bindings/clock/renesas-cpg-mssr.h>
> +#include <dt-bindings/clock/r8a77965-cpg-mssr.h>
>  #include <dt-bindings/interrupt-controller/arm-gic.h>
>  #include <dt-bindings/power/r8a77965-sysc.h>


-- 
Regards,

Laurent Pinchart



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