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Message-ID: <CAD=FV=WfC5x12kFd7Uw8DTR=OFx4HFJhJrd-sDZ5EJgkWL3tQw@mail.gmail.com>
Date: Tue, 1 May 2018 16:45:25 -0700
From: Doug Anderson <dianders@...omium.org>
To: Lina Iyer <ilina@...eaurora.org>
Cc: Andy Gross <andy.gross@...aro.org>,
David Brown <david.brown@...aro.org>,
linux-arm-msm@...r.kernel.org,
"open list:ARM/QUALCOMM SUPPORT" <linux-soc@...r.kernel.org>,
Rajendra Nayak <rnayak@...eaurora.org>,
Bjorn Andersson <bjorn.andersson@...aro.org>,
LKML <linux-kernel@...r.kernel.org>,
Stephen Boyd <sboyd@...nel.org>,
Evan Green <evgreen@...omium.org>, devicetree@...r.kernel.org
Subject: Re: [PATCH v6 02/10] dt-bindings: introduce RPMH RSC bindings for
Qualcomm SoCs
Hi,
On Thu, Apr 19, 2018 at 3:16 PM, Lina Iyer <ilina@...eaurora.org> wrote:
> +TCS-OFFSET: 0xD00
> +
> + apps_rsc: rsc@...e000 {
This label is wrong in two ways:
1. I believe it's supposed to be the first reg listed, so 179c0000
2. There's only 3 0's at the end.
Thus, it should be:
apps_rsc: rsc@...c0000
> + label = "apps_rsc";
> + compatible = "qcom,rpmh-rsc";
> + reg = <0x179c0000 0x10000>, <0x179d0000 0x10000>,
> + <0x179e0000 0x10000>, <0xd00 0>;
> + reg-names = "drv-0", "drv-1", "drv-2", "tcs-offset";
> + interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
> + qcom,drv-id = <2>;
> + qcom,tcs-config = <SLEEP_TCS 3>,
> + <WAKE_TCS 3>,
> + <ACTIVE_TCS 2>,
> + <CONTROL_TCS 1>;
> + };
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