lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20180512170034.12779313@bbrezillon>
Date:   Sat, 12 May 2018 17:00:34 +0200
From:   Boris Brezillon <boris.brezillon@...tlin.com>
To:     Paul Cercueil <paul@...pouillou.net>
Cc:     Mark Rutland <mark.rutland@....com>,
        David Woodhouse <dwmw2@...radead.org>,
        linux-mtd@...ts.infradead.org, Rob Herring <robh+dt@...nel.org>,
        linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
        Brian Norris <computersforpeace@...il.com>,
        Richard Weinberger <richard@....at>,
        Boris Brezillon <boris.brezillon@...in.com>,
        Marek Vasut <marek.vasut@...il.com>
Subject: Re: [PATCH] mtd: nand: Add support for reading ooblayout from
 device tree

On Sat, 12 May 2018 11:38:26 -0300
Paul Cercueil <paul@...pouillou.net> wrote:

> Le sam. 12 mai 2018 à 10:42, Boris Brezillon 
> <boris.brezillon@...tlin.com> a écrit :
> > On Sat, 12 May 2018 08:55:40 -0300
> > Paul Cercueil <paul@...pouillou.net> wrote:
> >   
> >>  Hi Boris,
> >> 
> >>  Le 12 mai 2018 02:55, Boris Brezillon <boris.brezillon@...tlin.com> 
> >> a écrit :  
> >>  >
> >>  > Hi Paul,
> >>  >
> >>  > On Fri, 11 May 2018 23:29:12 +0200
> >>  > Paul Cercueil <paul@...pouillou.net> wrote:
> >>  >  
> >>  > > By specifying the properties "mtd-oob-ecc" and "mtd-oob-free",   
> >> it is  
> >>  > > now possible to specify from devicetree where the ECC data is   
> >> located  
> >>  > > inside the OOB region.  
> >>  >
> >>  > Why would we want to do that? I mean, ECC/free regions are ECC
> >>  > controller dependent (and NAND chip dependent for the OOB size   
> >> part),  
> >>  > so there's no reason to describe it in the DT. And more   
> >> importantly,  
> >>  > people are likely to get it wrong.
> >>  >
> >>  > I'm curious, why do you need that?  
> >> 
> >>  Good question.
> >> 
> >>  The reason is that some SoCs have no ECC controller.
> >>  The various boards for these SoCs then all use a different layout.  
> > 
> > Okay. Still think defining the layouts in the DT is a bad idea. We
> > can add a jz4740 specific property to define the layout id
> > (ingenic,nand-oob-layout = <layout-id>), but not a generic way to
> > define custom layouts for all kind of NAND controller.  
> 
> Okay.
> 
> >> 
> >>  My motivation is to get rid of this (move it to devicetree):
> >>  
> >> https://elixir.bootlin.com/linux/latest/source/arch/mips/jz4740/board-qi_lb60.c#L93
> >>  And enable the support of other boards with custom OOB layouts.  
> > 
> > Can you list the different layouts you have? I'm pretty sure there's a
> > pattern. Maybe we can even deduce the layout from the page size or OOB
> > size.  
> 
> This is the other layout I have for another ingenic device:
> http://projects.qi-hardware.com/index.php/p/qi-kernel/source/tree/od-2011-09-18/arch/mips/jz4740/board-a320.c#L125
> 
> Page size and OOB size are the same between these two devices.

Indeed. Do you know if there are other kind of layouts in the wild?
Note that <layout-id> can be a string, so if each each board is
defining its own layout, you could specify the board name here.
Otherwise, if you just have those 2 patterns, you can just name them
"contiguous" and "interleaved".


Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ