linux-kernel - Re: [PATCH 2/4] scsi: ufs: add quirk not to allow reset of interrupt aggregation

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Message-ID: <4b8de89ece0390be3d5e8473e2ab08b7@codeaurora.org>
Date:   Wed, 16 May 2018 14:24:24 -0700
From:   Subhash Jadavani <subhashj@...eaurora.org>
To:     Alim Akhtar <alim.akhtar@...sung.com>
Cc:     linux-scsi@...r.kernel.org, linux-kernel@...r.kernel.org,
        jejb@...ux.vnet.ibm.com, martin.petersen@...cle.com,
        vivek.gautam@...eaurora.org, vinholikatti@...il.com,
        olof@...om.net, linux-scsi-owner@...r.kernel.org
Subject: Re: [PATCH 2/4] scsi: ufs: add quirk not to allow reset of interrupt
 aggregation

On 2018-05-06 03:14, Alim Akhtar wrote:
> Some host controller supports interrupt aggregation, but doesn't
> allow to reset counter and timer by s/w.
> 
> Signed-off-by: Seungwon Jeon <essuuj@...il.com>
> Signed-off-by: Alim Akhtar <alim.akhtar@...sung.com>
> ---
>  drivers/scsi/ufs/ufshcd.c | 3 ++-
>  drivers/scsi/ufs/ufshcd.h | 6 ++++++
>  2 files changed, 8 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c
> index 9898ce5..253257c 100644
> --- a/drivers/scsi/ufs/ufshcd.c
> +++ b/drivers/scsi/ufs/ufshcd.c
> @@ -4695,7 +4695,8 @@ static void ufshcd_transfer_req_compl(struct 
> ufs_hba *hba)
>  	 * false interrupt if device completes another request after 
> resetting
>  	 * aggregation and before reading the DB.
>  	 */
> -	if (ufshcd_is_intr_aggr_allowed(hba))
> +	if (ufshcd_is_intr_aggr_allowed(hba) &&
> +	    !(hba->quirks & UFSHCI_QUIRK_SKIP_RESET_INTR_AGGR))
>  		ufshcd_reset_intr_aggr(hba);
> 
>  	tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
> diff --git a/drivers/scsi/ufs/ufshcd.h b/drivers/scsi/ufs/ufshcd.h
> index 43035f8..5c91ff1 100644
> --- a/drivers/scsi/ufs/ufshcd.h
> +++ b/drivers/scsi/ufs/ufshcd.h
> @@ -600,6 +600,12 @@ struct ufs_hba {
>  	 */
>  	#define UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR		0x100
> 
> +	/*
> +	 * This quirk needs to be enabled if host controller doesn't allow
> +	 * that the interrupt aggregation timer and counter are reset by s/w.
> +	 */
> +	#define UFSHCI_QUIRK_SKIP_RESET_INTR_AGGR		0x200
> +
>  	unsigned int quirks;	/* Deviations from standard UFSHCI spec. */
> 
>  	/* Device deviations from standard UFS device spec. */

Looks good to me.
Reviewed-by: Subhash Jadavani <subhashj@...eaurora.org>

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