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Message-ID: <5466c5674239490053d349a2ab145f72@codeaurora.org>
Date: Wed, 16 May 2018 14:26:24 -0700
From: Subhash Jadavani <subhashj@...eaurora.org>
To: Alim Akhtar <alim.akhtar@...sung.com>
Cc: linux-scsi@...r.kernel.org, linux-kernel@...r.kernel.org,
jejb@...ux.vnet.ibm.com, martin.petersen@...cle.com,
vivek.gautam@...eaurora.org, vinholikatti@...il.com, olof@...om.net
Subject: Re: [PATCH 3/4] scsi: ufs: add quirk to enable host controller
without hce
On 2018-05-06 03:14, Alim Akhtar wrote:
> Some host controller doesn't support host controller enable via HCE.
>
> Signed-off-by: Seungwon Jeon <essuuj@...il.com>
> Signed-off-by: Alim Akhtar <alim.akhtar@...sung.com>
> ---
> drivers/scsi/ufs/ufshcd.c | 75
> +++++++++++++++++++++++++++++++++++++++++++++--
> drivers/scsi/ufs/ufshcd.h | 5 ++++
> 2 files changed, 78 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c
> index 253257c..5bfd385 100644
> --- a/drivers/scsi/ufs/ufshcd.c
> +++ b/drivers/scsi/ufs/ufshcd.c
> @@ -3400,6 +3400,52 @@ static int ufshcd_dme_link_startup(struct
> ufs_hba *hba)
> "dme-link-startup: error code %d\n", ret);
> return ret;
> }
> +/**
> + * ufshcd_dme_reset - UIC command for DME_RESET
> + * @hba: per adapter instance
> + *
> + * DME_RESET command is issued in order to reset UniPro stack.
> + * This function now deal with cold reset.
> + *
> + * Returns 0 on success, non-zero value on failure
> + */
> +static int ufshcd_dme_reset(struct ufs_hba *hba)
> +{
> + struct uic_command uic_cmd = {0};
> + int ret;
> +
> + uic_cmd.command = UIC_CMD_DME_RESET;
> +
> + ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
> + if (ret)
> + dev_err(hba->dev,
> + "dme-reset: error code %d\n", ret);
> +
> + return ret;
> +}
> +
> +/**
> + * ufshcd_dme_enable - UIC command for DME_ENABLE
> + * @hba: per adapter instance
> + *
> + * DME_ENABLE command is issued in order to enable UniPro stack.
> + *
> + * Returns 0 on success, non-zero value on failure
> + */
> +static int ufshcd_dme_enable(struct ufs_hba *hba)
> +{
> + struct uic_command uic_cmd = {0};
> + int ret;
> +
> + uic_cmd.command = UIC_CMD_DME_ENABLE;
> +
> + ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
> + if (ret)
> + dev_err(hba->dev,
> + "dme-reset: error code %d\n", ret);
> +
> + return ret;
> +}
>
> static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba
> *hba)
> {
> @@ -4058,7 +4104,7 @@ static inline void ufshcd_hba_stop(struct
> ufs_hba *hba, bool can_sleep)
> }
>
> /**
> - * ufshcd_hba_enable - initialize the controller
> + * ufshcd_hba_execute_hce - initialize the controller
> * @hba: per adapter instance
> *
> * The controller resets itself and controller firmware initialization
> @@ -4067,7 +4113,7 @@ static inline void ufshcd_hba_stop(struct
> ufs_hba *hba, bool can_sleep)
> *
> * Returns 0 on success, non-zero value on failure
> */
> -static int ufshcd_hba_enable(struct ufs_hba *hba)
> +static int ufshcd_hba_execute_hce(struct ufs_hba *hba)
> {
> int retry;
>
> @@ -4122,6 +4168,31 @@ static int ufshcd_hba_enable(struct ufs_hba
> *hba)
> return 0;
> }
>
> +static int ufshcd_hba_enable(struct ufs_hba *hba)
> +{
> + int ret;
> +
> + if (hba->quirks & UFSHCI_QUIRK_BROKEN_HCE) {
> + ufshcd_set_link_off(hba);
> + ufshcd_vops_hce_enable_notify(hba, PRE_CHANGE);
> +
> + /* enable UIC related interrupts */
> + ufshcd_enable_intr(hba, UFSHCD_UIC_MASK);
> + ret = ufshcd_dme_reset(hba);
> + if (!ret) {
> + ret = ufshcd_dme_enable(hba);
> + if (!ret)
> + ufshcd_vops_hce_enable_notify(hba, POST_CHANGE);
> + if (ret)
> + dev_err(hba->dev,
> + "Host controller enable failed with non-hce\n");
> + }
> + } else {
> + ret = ufshcd_hba_execute_hce(hba);
> + }
> +
> + return ret;
> +}
> static int ufshcd_disable_tx_lcc(struct ufs_hba *hba, bool peer)
> {
> int tx_lanes, i, err = 0;
> diff --git a/drivers/scsi/ufs/ufshcd.h b/drivers/scsi/ufs/ufshcd.h
> index 5c91ff1..013a07e 100644
> --- a/drivers/scsi/ufs/ufshcd.h
> +++ b/drivers/scsi/ufs/ufshcd.h
> @@ -606,6 +606,11 @@ struct ufs_hba {
> */
> #define UFSHCI_QUIRK_SKIP_RESET_INTR_AGGR 0x200
>
> + /*
> + * This quirks needs to be enabled if host controller cannot be
> + * enabled via HCE register.
> + */
> + #define UFSHCI_QUIRK_BROKEN_HCE 0x400
> unsigned int quirks; /* Deviations from standard UFSHCI spec. */
>
> /* Device deviations from standard UFS device spec. */
Looks good to me.
Reviewed-by: Subhash Jadavani <subhashj@...eaurora.org>
--
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