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Message-ID: <a34429cf43124de623fcaa645d5d7a360c755867.camel@microchip.com>
Date: Wed, 16 May 2018 13:05:21 +0300
From: Radu Pirea <radu.pirea@...rochip.com>
To: Marek Vasut <marek.vasut@...il.com>,
Boris Brezillon <boris.brezillon@...tlin.com>
CC: <linux-kernel@...r.kernel.org>, <linux-mtd@...ts.infradead.org>,
<Zhiqiang.Hou@....com>, <pp@...ix.com>, <richard@....at>,
<computersforpeace@...il.com>, <dwmw2@...radead.org>
Subject: Re: [PATCH] mtd: spi-nor: add support for Microchip 25LC256
On Wed, 2018-05-16 at 00:17 +0200, Marek Vasut wrote:
> On 05/15/2018 06:22 PM, Radu Pirea wrote:
> > On Fri, 2018-05-04 at 20:40 +0200, Boris Brezillon wrote:
> > > On Fri, 4 May 2018 18:54:04 +0300
> > > Radu Pirea <radu.pirea@...rochip.com> wrote:
> > >
> > > > Added geometry description for Microchip 25LC256 memory.
> > >
> > > Same as for the dataflash stuff you posted a few weeks ago: I
> > > don't
> > > think this device belongs in the SPI NOR framework.
> >
> > Hi Boris,
> >
> > 25lc256 memory is similar with mr25h256, the only difference is the
> > page size(64 vs 256). Because mr25h256 is already in SPI NOR
> > framework
> > I added here 25lc256.
>
> I think I must be reading the wrong datasheet, but can you show me
> how
> does it support things like READID opcode ?
>
Hi Marek,
I read the datasheet for 25lc256 and for mr25h256 and none of them
supports READID. Is this required for a chip to be included in spi-nor
framework? I just followed the mr25h256 as an example.
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