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Message-ID: <20180518132143.3105f301@bbrezillon>
Date: Fri, 18 May 2018 13:21:43 +0200
From: Boris Brezillon <boris.brezillon@...tlin.com>
To: Andy Yan <andy.yan@...k-chips.com>
Cc: cyrille.pitchen@...ev4u.fr, mchehab@...nel.org, robh+dt@...nel.org,
linux-mtd@...ts.infradead.org, shawn.lin@...k-chips.com,
heiko@...ech.de, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
boris.brezillon@...e-electrons.com
Subject: Re: [PATCH v8 2/3] mtd: spi-nor: add rockchip serial flash
controller driver
Hi Andy,
Sorry for the late reply.
On Thu, 8 Feb 2018 20:18:47 +0800
Andy Yan <andy.yan@...k-chips.com> wrote:
> From: Shawn Lin <shawn.lin@...k-chips.com>
Commit message please.
>
> Add Rockchip SFC(serial flash controller) driver.
>
> Signed-off-by: Shawn Lin <shawn.lin@...k-chips.com>
> Signed-off-by: Andy Yan <andy.yan@...k-chips.com>
> Acked-by: Marek Vasut <marek.vasut@...il.com>
>
> ---
>
> Changes in v8:
> - remove unused macro SFC_CMD_TRAN_BYTES_MASK
> - set max transfer length to 15.5KB
> - remove unnecessary buffer align check
> - remove the duplicate logic what spi-nor.c already does for spi_nor_write
> - add spi_nor_erase, as the SFC should get the erase address.
Would you mind sending a new version addressing the problem reported by
kbuild robots and the comments made by Ezequiel and Robin?
Also, maybe it's too much work, but it would be good to check if the
driver could use the spi_mem interface [1] so that you can move it to
drivers/spi/ and possibly get everything ready for SPI NANDs.
Thanks,
Boris
[1]https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git/tree/include/linux/spi/spi-mem.h?h=for-4.18
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