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Message-ID: <alpine.DEB.2.21.1805181222380.11339@macbook-air>
Date: Fri, 18 May 2018 12:29:36 -0400 (EDT)
From: Vince Weaver <vincent.weaver@...ne.edu>
To: Marc Zyngier <marc.zyngier@....com>
cc: linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
Will Deacon <will.deacon@....com>,
Mark Rutland <mark.rutland@....com>,
Russell King <linux@....linux.org.uk>,
Vladimir Murzin <vladimir.murzin@....com>,
Vince Weaver <vincent.weaver@...ne.edu>,
Peter Zijlstra <peterz@...radead.org>,
Stefan Wahren <stefan.wahren@...e.com>,
Eric Anholt <eric@...olt.net>,
Florian Fainelli <f.fainelli@...il.com>
Subject: Re: [PATCH v3 0/5]
On Fri, 18 May 2018, Marc Zyngier wrote:
> There is also the case of people natively running 32bit kernels on
> 64bit HW and trying to upstream unspeakable hacks, hoping that the
> stars will align and that they'll win the lottery (see [1]).
I've tested these patches on a Raspberry Pi 3B running a 32-bit upstream
(4.17-rc5-git) kernel and they work.
[ 0.472906] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available
I only needed to add this to the devicetree
arm-pmu {
compatible = "arm,cortex-a53-pmu";
interrupt-parent = <&local_intc>;
interrupts = <9 IRQ_TYPE_LEVEL_HIGH>;
};
Tested-by: Vince Weaver <vincent.weaver@...ne.edu>
Vince
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