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Date:   Fri, 18 May 2018 17:41:09 +0100
From:   Marc Zyngier <marc.zyngier@....com>
To:     Vince Weaver <vincent.weaver@...ne.edu>
Cc:     linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        Will Deacon <will.deacon@....com>,
        Mark Rutland <mark.rutland@....com>,
        Russell King <linux@....linux.org.uk>,
        Vladimir Murzin <vladimir.murzin@....com>,
        Peter Zijlstra <peterz@...radead.org>,
        Stefan Wahren <stefan.wahren@...e.com>,
        Eric Anholt <eric@...olt.net>,
        Florian Fainelli <f.fainelli@...il.com>
Subject: Re: [PATCH v3 0/5]

[/me beats himself for not writing a subject line...]

On 18/05/18 17:29, Vince Weaver wrote:
> On Fri, 18 May 2018, Marc Zyngier wrote:
> 
>> There is also the case of people natively running 32bit kernels on
>> 64bit HW and trying to upstream unspeakable hacks, hoping that the
>> stars will align and that they'll win the lottery (see [1]).
> 
> I've tested these patches on a Raspberry Pi 3B running a 32-bit upstream 
> (4.17-rc5-git) kernel and they work.
> 
> [    0.472906] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available
> 
> I only needed to add this to the devicetree
> 
> 	arm-pmu {
> 		compatible = "arm,cortex-a53-pmu";
> 		interrupt-parent = <&local_intc>;
> 		interrupts = <9 IRQ_TYPE_LEVEL_HIGH>;
> 	};

That's definitely the sensible thing to have on such hardware. Why isn't
it in the upstream DT already, irrespective of the state of the kernel
support?

> Tested-by: Vince Weaver <vincent.weaver@...ne.edu>

Thanks a lot for testing.

	M.
-- 
Jazz is not dead. It just smells funny...

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