[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <19ab48d1-333c-73fa-8586-c433b5bd7b90@oracle.com>
Date: Wed, 23 May 2018 12:30:47 -0400
From: Boris Ostrovsky <boris.ostrovsky@...cle.com>
To: Jan Beulich <JBeulich@...e.com>
Cc: brgerst@...il.com, xen-devel <xen-devel@...ts.xenproject.org>,
Juergen Gross <jgross@...e.com>, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v5 1/2] xen/PVH: Set up GS segment for stack canary
On 05/23/2018 11:41 AM, Jan Beulich wrote:
>>>> On 23.05.18 at 16:30, <boris.ostrovsky@...cle.com> wrote:
>> @@ -98,6 +101,12 @@ ENTRY(pvh_start_xen)
>> /* 64-bit entry point. */
>> .code64
>> 1:
>> + /* Set base address in stack canary descriptor. */
>> + mov $MSR_GS_BASE,%ecx
>> + mov $_pa(canary), %rax
>> + xor %rdx, %rdx
> Why rax and rdx instead of eax and edx? In the former case, the
> relocation produced might confuse whatever entity processing it
> (it'll have a sign-extended 32-bit quantity to deal with, which
> wouldn't allow representing an address in the [2Gb, 4Gb) range).
> In the latter case, while surely neither performance nor code size
> matter much here, it's still a bad precedent (people copy-and-paste
> code all the time): Zero-ing of registers should generally use the
> 32-bit forms of the insn. Gas has actually gained an optimization
> mode recently (upon request from Linus and the x86 maintainers)
> to silently "repair" such inefficiencies.
Sure, I can replace these two with 32-bit variants. If there are no
other comments I won't re-send this again.
-boris
Powered by blists - more mailing lists