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Message-ID: <152792144851.225090.7409061495035612435@swboyd.mtv.corp.google.com>
Date: Fri, 01 Jun 2018 23:37:28 -0700
From: Stephen Boyd <sboyd@...nel.org>
To: Dmitry Osipenko <digetx@...il.com>,
Jonathan Hunter <jonathanh@...dia.com>,
Mark Rutland <mark.rutland@....com>,
Michael Turquette <mturquette@...libre.com>,
Peter De Schrijver <pdeschrijver@...dia.com>,
Prashant Gaikwad <pgaikwad@...dia.com>,
Rob Herring <robh+dt@...nel.org>,
Thierry Reding <thierry.reding@...il.com>
Cc: linux-tegra@...r.kernel.org, linux-clk@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v1 3/4] clk: tegra20: Turn EMC clock gate into divider
Quoting Dmitry Osipenko (2018-05-30 08:06:45)
> Kernel should never gate the EMC clock as it causes immediate lockup, so
> removing clk-gate functionality doesn't affect anything. Turning EMC clk
> gate into divider allows to implement glitch-less EMC scaling, avoiding
> reparenting to a backup clock.
>
> Signed-off-by: Dmitry Osipenko <digetx@...il.com>
Looks ok to me, but I'm waiting for someone from Tegra side to ack it or
review it.
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