lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Fri, 8 Jun 2018 14:34:53 +0000
From:   "Kang, Luwei" <luwei.kang@...el.com>
To:     Alexander Shishkin <alexander.shishkin@...ux.intel.com>
CC:     "kvm@...r.kernel.org" <kvm@...r.kernel.org>,
        "tglx@...utronix.de" <tglx@...utronix.de>,
        "mingo@...hat.com" <mingo@...hat.com>,
        "hpa@...or.com" <hpa@...or.com>, "x86@...nel.org" <x86@...nel.org>,
        "chao.p.peng@...ux.intel.com" <chao.p.peng@...ux.intel.com>,
        "thomas.lendacky@....com" <thomas.lendacky@....com>,
        "bp@...e.de" <bp@...e.de>, "Liang, Kan" <kan.liang@...el.com>,
        "Janakarajan.Natarajan@....com" <Janakarajan.Natarajan@....com>,
        "dwmw@...zon.co.uk" <dwmw@...zon.co.uk>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "peterz@...radead.org" <peterz@...radead.org>,
        "mathieu.poirier@...aro.org" <mathieu.poirier@...aro.org>,
        "kstewart@...uxfoundation.org" <kstewart@...uxfoundation.org>,
        "gregkh@...uxfoundation.org" <gregkh@...uxfoundation.org>,
        "pbonzini@...hat.com" <pbonzini@...hat.com>,
        "rkrcmar@...hat.com" <rkrcmar@...hat.com>,
        "david@...hat.com" <david@...hat.com>,
        "bsd@...hat.com" <bsd@...hat.com>,
        "yu.c.zhang@...ux.intel.com" <yu.c.zhang@...ux.intel.com>,
        "joro@...tes.org" <joro@...tes.org>
Subject: RE: [PATCH v9 04/12] perf/x86/intel/pt: add new capability for
 Intel PT

> > CPUID(EAX=14H,ECX=0):EBX[bit 3] = 1 indicates support of output to
> > Trace Transport subsystem.
> > MSR IA32_RTIT_CTL.FabricEn[bit 6] is reserved if CPUID.(EAX=14H,
> > ECX=0):ECX[bit 3] = 0.
> 
> This should instead say:
> 
> This adds support for "output to Trace Transport subsystem" capability of
> Intel PT, as documented in IA SDM Chapter 36.x.y.z. It means that PT can
> output its trace to an MMIO address range rather than system memory
> buffer.

Yes, you are right. In KVM point of view this bit use for MSR access security check.
KVM will track MSRs access in guest, an #GP will be injected to guest if guest try to write IA32_RTIT_CTL.FabricEn[bit 6]  when "output_subsys" (CPUID.(EAX=14H, ECX=0):ECX[bit 3] = 0) is not supported.

Thanks,
Luwei Kang

> 
> > This is use for emulate IA32_RTIT_CTL MSR read/write in KVM. KVM guest
> > write IA32_RTIT_CTL will trap to root mode and a #GP would be injected
> > to guest if set IA32_RTIT_CTL.FabricEn with CPUID.(EAX=14H,
> > ECX=0):ECX[bit 3] = 0.
> 
> I'm not sure what this means, this patch has nothing to do with KVM as far as
> I can tell.
> 
> Aside from the commit message, this is a valid patch.
> 
> Thanks,
> --
> Alex

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ