linux-kernel - [PATCH v1 4/5] ARM: dts: Renesas R9A06G032 pinctrl node

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Message-Id: <1528974029-29617-5-git-send-email-michel.pollet@bp.renesas.com>
Date:   Thu, 14 Jun 2018 12:00:20 +0100
From:   Michel Pollet <michel.pollet@...renesas.com>
To:     linux-renesas-soc@...r.kernel.org,
        Simon Horman <horms@...ge.net.au>
Cc:     phil.edworthy@...esas.com,
        Michel Pollet <buserror+upstream@...il.com>,
        Michel Pollet <michel.pollet@...renesas.com>,
        Linus Walleij <linus.walleij@...aro.org>,
        Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        linux-gpio@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: [PATCH v1 4/5] ARM: dts: Renesas R9A06G032 pinctrl node

This provides a pinctrl driver for the Renesas R9A06G032 SoC

Signed-off-by: Michel Pollet <michel.pollet@...renesas.com>
---
 arch/arm/boot/dts/r9a06g032.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/arm/boot/dts/r9a06g032.dtsi b/arch/arm/boot/dts/r9a06g032.dtsi
index 3e45375..fbad039 100644
--- a/arch/arm/boot/dts/r9a06g032.dtsi
+++ b/arch/arm/boot/dts/r9a06g032.dtsi
@@ -88,6 +88,14 @@
 			status = "disabled";
 		};
 
+		pinctrl: pinctrl@...67000 {
+			compatible = "renesas,r9a06g032-pinctrl";
+			reg = <0x40067000 0x1000>, <0x51000000 0x800>;
+			clocks = <&sysctrl R9A06G032_HCLK_PINCONFIG>;
+			clock-names = "bus";
+			status = "okay";
+		};
+
 		gic: gic@...01000 {
 			compatible = "arm,cortex-a7-gic", "arm,gic-400";
 			interrupt-controller;
-- 
2.7.4