linux-kernel - Re: [PATCH v1 4/5] ARM: dts: Renesas R9A06G032 pinctrl node

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <7e9eefe0-5310-5925-3b00-b75800e6d87e@cogentembedded.com>
Date:   Thu, 14 Jun 2018 14:42:32 +0300
From:   Sergei Shtylyov <sergei.shtylyov@...entembedded.com>
To:     Michel Pollet <michel.pollet@...renesas.com>,
        linux-renesas-soc@...r.kernel.org,
        Simon Horman <horms@...ge.net.au>
Cc:     phil.edworthy@...esas.com,
        Michel Pollet <buserror+upstream@...il.com>,
        Linus Walleij <linus.walleij@...aro.org>,
        Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        linux-gpio@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH v1 4/5] ARM: dts: Renesas R9A06G032 pinctrl node

Hello!

On 06/14/2018 02:00 PM, Michel Pollet wrote:

> This provides a pinctrl driver for the Renesas R9A06G032 SoC
> 
> Signed-off-by: Michel Pollet <michel.pollet@...renesas.com>
> ---
>  arch/arm/boot/dts/r9a06g032.dtsi | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/r9a06g032.dtsi b/arch/arm/boot/dts/r9a06g032.dtsi
> index 3e45375..fbad039 100644
> --- a/arch/arm/boot/dts/r9a06g032.dtsi
> +++ b/arch/arm/boot/dts/r9a06g032.dtsi
> @@ -88,6 +88,14 @@
>  			status = "disabled";
>  		};
>  
> +		pinctrl: pinctrl@...67000 {

   "pin-controller@..." please, it's looking more generic.

> +			compatible = "renesas,r9a06g032-pinctrl";
> +			reg = <0x40067000 0x1000>, <0x51000000 0x800>;
> +			clocks = <&sysctrl R9A06G032_HCLK_PINCONFIG>;
> +			clock-names = "bus";
> +			status = "okay";
> +		};
> +
>  		gic: gic@...01000 {
>  			compatible = "arm,cortex-a7-gic", "arm,gic-400";
>  			interrupt-controller;

MBR, Sergei