linux-kernel - Re: [PATCH V2 1/3] scsi: ufs: set the device reference clock setting

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Message-ID: <CAL_JsqLsdEGEjPo8yh5dGoGWTes41QxUiJ4NN0Q9qsgLBaTpjw@mail.gmail.com>
Date:   Thu, 14 Jun 2018 08:29:20 -0600
From:   Rob Herring <robh@...nel.org>
To:     sayali <sayalil@...eaurora.org>
Cc:     Subhash Jadavani <subhashj@...eaurora.org>,
        Can Guo <cang@...eaurora.org>,
        Vivek Gautam <vivek.gautam@...eaurora.org>,
        Rajendra Nayak <rnayak@...eaurora.org>,
        Vinayak Holikatti <vinholikatti@...il.com>,
        "James E.J. Bottomley" <jejb@...ux.vnet.ibm.com>,
        "Martin K. Petersen" <martin.petersen@...cle.com>,
        asutoshd@...eaurora.org, Evan Green <evgreen@...omium.org>,
        linux-scsi@...r.kernel.org, Mark Rutland <mark.rutland@....com>,
        Mathieu Malaterre <malat@...ian.org>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@...r.kernel.org>,
        open list <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH V2 1/3] scsi: ufs: set the device reference clock setting

On Thu, Jun 14, 2018 at 5:33 AM, sayali <sayalil@...eaurora.org> wrote:
> Comment inline.
>
> Thanks,
> Sayali
> -----Original Message-----
> From: Rob Herring [mailto:robh@...nel.org]
> Sent: Wednesday, June 13, 2018 12:57 AM
> To: Sayali Lokhande <sayalil@...eaurora.org>
> Cc: subhashj@...eaurora.org; cang@...eaurora.org;
> vivek.gautam@...eaurora.org; rnayak@...eaurora.org; vinholikatti@...il.com;
> jejb@...ux.vnet.ibm.com; martin.petersen@...cle.com;
> asutoshd@...eaurora.org; evgreen@...omium.org; linux-scsi@...r.kernel.org;
> Mark Rutland <mark.rutland@....com>; Mathieu Malaterre <malat@...ian.org>;
> open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS
> <devicetree@...r.kernel.org>; open list <linux-kernel@...r.kernel.org>
> Subject: Re: [PATCH V2 1/3] scsi: ufs: set the device reference clock
> setting
>
> On Fri, Jun 08, 2018 at 04:36:28PM +0530, Sayali Lokhande wrote:
>> From: Subhash Jadavani <subhashj@...eaurora.org>
>>
>> UFS host supplies the reference clock to UFS device and UFS device
>> specification allows host to provide one of the 4 frequencies (19.2
>> MHz,
>> 26 MHz, 38.4 MHz, 52 MHz) for reference clock. Host should set the
>> device reference clock frequency setting in the device based on what
>> frequency it is supplying to UFS device.
>>
>> Signed-off-by: Subhash Jadavani <subhashj@...eaurora.org>
>> Signed-off-by: Can Guo <cang@...eaurora.org>
>> Signed-off-by: Sayali Lokhande <sayalil@...eaurora.org>
>> ---
>>  .../devicetree/bindings/ufs/ufshcd-pltfrm.txt      |  7 +++
>>  drivers/scsi/ufs/ufs.h                             |  9 ++++
>>  drivers/scsi/ufs/ufshcd-pltfrm.c                   | 24 ++++++++++
>>  drivers/scsi/ufs/ufshcd.c                          | 52
> ++++++++++++++++++++++
>>  drivers/scsi/ufs/ufshcd.h                          |  1 +
>>  5 files changed, 93 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
>> b/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
>> index c39dfef..4522434 100644
>> --- a/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
>> +++ b/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
>> @@ -41,6 +41,12 @@ Optional properties:
>>  -lanes-per-direction : number of lanes available per direction - either 1
> or 2.
>>                         Note that it is assume same number of lanes is
> used both
>>                         directions at once. If not specified, default is 2
> lanes per direction.
>> +- dev-ref-clk-freq   : Specify the device reference clock frequency, must
> be one of the following:
>> +                       0: 19.2 MHz
>> +                       1: 26 MHz
>> +                       2: 38.4 MHz
>> +                       3: 52 MHz
>> +                       Defaults to 26 MHz if not specified.
>
> I must have misunderstood your last response. I thought you could handle
> things without DT. If not, my question remains.
> [Sayali]: Ref clk frequency setting could vary from
> platfrom-to-platform(vendor specific). Hence we need to pass it via DT.
>         Currently in DT we do not set/mention any ref clk frequency
> parameter. Hence I have added one new DT entry to configure
>         required ref clk freq.

The clocks property contains "ref_clk". Is that not the same clock?
Why can't you read what that frequency is? Or you need to be able to
change it to a specific frequency? These all look like typical
oscillator frequencies, so I wouldn't expect you could change them
(other than divide by 2 maybe).

Rob