lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
Open Source and information security mailing list archives
| ||
|
Date: Mon, 18 Jun 2018 11:10:51 -0700 From: Vineet Gupta <Vineet.Gupta1@...opsys.com> To: Alexey Brodkin <Alexey.Brodkin@...opsys.com>, "gustavo.pimentel@...opsys.com" <gustavo.pimentel@...opsys.com> CC: "robh@...nel.org" <robh@...nel.org>, "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>, "Eugeniy.Paltsev@...opsys.com" <Eugeniy.Paltsev@...opsys.com>, "sboyd@...eaurora.org" <sboyd@...eaurora.org>, "linux-snps-arc@...ts.infradead.org" <linux-snps-arc@...ts.infradead.org> Subject: Re: [PATCH] ARC: Add PCIe support for ARC HSDK platform On 06/18/2018 08:20 AM, Alexey Brodkin wrote: >> +static void __init hsdk_enable_gpio_intc_wire(void) >> +{ >> + u32 val = GPIO_HAPS_INT; >> + >> + iowrite32(0xffffffff, (void __iomem *) GPIO_INTMASK); >> + iowrite32(~val, (void __iomem *) GPIO_INTMASK); >> + iowrite32(0x00000000, (void __iomem *) GPIO_INTTYPE_LEVEL); >> + iowrite32(0xffffffff, (void __iomem *) GPIO_INT_POLARITY); >> + iowrite32(val, (void __iomem *) GPIO_INTEN); >> +} > I would suggest to have a map of really used lines and enable all of them > instead of adding one-by-one occasionally. More importantly, adding any code in this file is an absolute abomination and only desired if this is a platform specific hack which can't be added in the generic driver and/or specified via the Device Tree. Here it seems like we are enabling some gpio lines which likely could be done via the gpio driver paths ? -Vineet
Powered by blists - more mailing lists