linux-kernel - RE: [PATCH] ARC: Add PCIe support for ARC HSDK platform

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Message-ID: <4881796E12491D4BB15146FE0209CE64680F2862@DE02WEMBXB.internal.synopsys.com>
Date:   Mon, 18 Jun 2018 19:46:06 +0000
From:   Alexey Brodkin <Alexey.Brodkin@...opsys.com>
To:     Vineet Gupta <Vineet.Gupta1@...opsys.com>,
        "gustavo.pimentel@...opsys.com" <gustavo.pimentel@...opsys.com>
CC:     "robh@...nel.org" <robh@...nel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "Eugeniy.Paltsev@...opsys.com" <Eugeniy.Paltsev@...opsys.com>,
        "sboyd@...eaurora.org" <sboyd@...eaurora.org>,
        "linux-snps-arc@...ts.infradead.org" 
        <linux-snps-arc@...ts.infradead.org>
Subject: RE: [PATCH] ARC: Add PCIe support for ARC HSDK platform

Hi Vineet,

> -----Original Message-----
> From: Vineet Gupta
> Sent: Monday, June 18, 2018 9:11 PM
> To: Alexey Brodkin <abrodkin@...opsys.com>; gustavo.pimentel@...opsys.com
> Cc: robh@...nel.org; linux-kernel@...r.kernel.org; Eugeniy.Paltsev@...opsys.com; sboyd@...eaurora.org; linux-snps-
> arc@...ts.infradead.org
> Subject: Re: [PATCH] ARC: Add PCIe support for ARC HSDK platform
> 
> On 06/18/2018 08:20 AM, Alexey Brodkin wrote:
> >> +static void __init hsdk_enable_gpio_intc_wire(void)
> >> +{
> >> +	u32 val = GPIO_HAPS_INT;
> >> +
> >> +	iowrite32(0xffffffff, (void __iomem *) GPIO_INTMASK);
> >> +	iowrite32(~val, (void __iomem *) GPIO_INTMASK);
> >> +	iowrite32(0x00000000, (void __iomem *) GPIO_INTTYPE_LEVEL);
> >> +	iowrite32(0xffffffff, (void __iomem *) GPIO_INT_POLARITY);
> >> +	iowrite32(val, (void __iomem *) GPIO_INTEN);
> >> +}
> > I would suggest to have a map of really used lines and enable all of them
> > instead of adding one-by-one occasionally.
> 
> More importantly, adding any code in this file is an absolute abomination and only
> desired if this is a platform specific hack which can't be added in the generic
> driver and/or specified via the Device Tree. Here it seems like we are enabling
> some gpio lines which likely could be done via the gpio driver paths ?

See my comment much higher - what we're doing here is pretty much the same as
With AXS10x - we implement wires which connect input interrupt lines to IDU.
Thus I'm not sure if it worth messing with DW APB GPIO INTC driver which as I mentioned
As well won't work as it is and we'll need to patch it to support multiple outputs mode.

-Alexey