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Message-ID: <1529453887.8701.0.camel@mtkswgap22>
Date:   Wed, 20 Jun 2018 08:18:07 +0800
From:   Mars Cheng <mars.cheng@...iatek.com>
To:     Matthias Brugger <matthias.bgg@...il.com>
CC:     Rob Herring <robh+dt@...nel.org>, CC Hwang <cc.hwang@...iatek.com>,
        "Loda Chou" <loda.chou@...iatek.com>,
        Miles Chen <miles.chen@...iatek.com>,
        "Jades Shih" <jades.shih@...iatek.com>,
        Yingjoe Chen <yingjoe.chen@...iatek.com>,
        My Chuang <my.chuang@...iatek.com>,
        <linux-kernel@...r.kernel.org>,
        <linux-mediatek@...ts.infradead.org>, <devicetree@...r.kernel.org>,
        <wsd_upstream@...iatek.com>
Subject: Re: [PATCH 2/2] arm64: dts: mediatek: add mt6765 support

Hi Matthias

On Fri, 2018-06-15 at 10:54 +0200, Matthias Brugger wrote:
> 
> On 13/06/18 00:40, Mars Cheng wrote:
> > +
> > +	uart0: serial@...02000 {
> > +		compatible = "mediatek,mt6765-uart",
> > +			     "mediatek,mt6577-uart";
> > +		reg = <0 0x11002000 0 0x400>;
> > +		interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_LOW>;
> > +		clocks = <&uart_clk>;
> > +		status = "disabled";
> > +	};
> 
> You need "baud" and "bus" clock. Also add clock-names please.

Got it, will add them in V2

> 
> > +
> > +	uart1: serial@...03000 {
> > +		compatible = "mediatek,mt6765-uart",
> > +			     "mediatek,mt6577-uart";
> > +		reg = <0 0x11003000 0 0x400>;
> > +		interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_LOW>;
> > +		clocks = <&uart_clk>;
> > +		status = "disabled";
> 
> Same here obviously.

Will fixed in V2.

Thanks.
> 
> Regards,
> Matthias


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