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Message-ID: <1846662.BtIxBD6EoV@blindfold>
Date: Wed, 20 Jun 2018 07:27:27 +0200
From: Richard Weinberger <richard@....at>
To: Marek Vasut <marek.vasut@...il.com>
Cc: devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-mtd@...ts.infradead.org, dinguyen@...nel.org,
robh+dt@...nel.org, mark.rutland@....com,
computersforpeace@...il.com, dwmw2@...radead.org,
miquel.raynal@...tlin.com, boris.brezillon@...tlin.com,
yamada.masahiro@...ionext.com,
"See, Chin Liang" <chin.liang.see@...el.com>
Subject: Re: [PATCH] arm: dts: socfpga: denali needs nand_x_clk too
Marek,
Am Mittwoch, 20. Juni 2018, 06:52:09 CEST schrieb Marek Vasut:
> On 06/19/2018 02:07 PM, Richard Weinberger wrote:
> > The denali NAND flash controller needs at least two clocks to operate,
> > nand_clk and nand_x_clk.
> > Since 1bb88666775e ("mtd: nand: denali: handle timing parameters by
> > setup_data_interface()") nand_x_clk is used to derive timing settings.
> >
> > Signed-off-by: Richard Weinberger <richard@....at>
> > ---
> > Strictly speaking denali needs a ecc_clk too, but AFAIK such a clock
> > is not present on this SoC.
> > But my SoCFPGA knowledge is very limited.
> >
> > Thanks,
> > //richard
>
> It looks sane, but I cannot test it right now, since I'm on vacation.
> I hope Dinh/Chin can jump in.
The patch was tested by me. So, at least it is not completely untested.
BTW: I forgot to mention that it depends on Masahiro's Denali fixes.
Thanks,
//richard
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