lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <3bd6e509-f99a-1f2d-1b66-65c414bacdbd@gmail.com>
Date:   Mon, 25 Jun 2018 17:14:32 +0200
From:   Matthias Brugger <matthias.bgg@...il.com>
To:     sean.wang@...iatek.com, sboyd@...eaurora.org,
        mturquette@...libre.com, robh+dt@...nel.org, mark.rutland@....com,
        p.zabel@...gutronix.de
Cc:     devicetree@...r.kernel.org, linux-mediatek@...ts.infradead.org,
        linux-clk@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 1/6] dt-bindings: gpu: mali-utgard: add
 mediatek,mt7623-mali compatible



On 27/04/18 10:14, sean.wang@...iatek.com wrote:
> From: Sean Wang <sean.wang@...iatek.com>
> 
> The MediaTek MT7623 SoC contains a Mali-450, so add a compatible for it
> and define its own vendor-specific properties.
> 
> Reviewed-by: Rob Herring <robh@...nel.org>
> Signed-off-by: Sean Wang <sean.wang@...iatek.com>
> ---

Hi Rob,

Any comments regarding this patch?

Regards,
Matthias

>  Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt | 9 +++++++++
>  1 file changed, 9 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt
> index 99d1c0a..656068f 100644
> --- a/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt
> +++ b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt
> @@ -19,6 +19,7 @@ Required properties:
>        + rockchip,rk3228-mali
>        + rockchip,rk3328-mali
>        + stericsson,db8500-mali
> +      + mediatek,mt7623-mali
>  
>    - reg: Physical base address and length of the GPU registers
>  
> @@ -89,6 +90,14 @@ to specify one more vendor-specific compatible, among:
>        * interrupt-names and interrupts:
>          + combined: combined interrupt of all of the above lines
>  
> +  - mediatek,mt7623-mali
> +     Required properties:
> +      * resets: phandle to the reset line for the GPU
> +      * mediatek,larb: phandle pointed to the local arbiter used to control the
> +	access to external memory on the SoC.
> +	see Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt
> +	for details
> +
>  Example:
>  
>  mali: gpu@...0000 {
> 

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ