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Message-ID: <1530089565.29697.35.camel@mtkswgap22>
Date: Wed, 27 Jun 2018 16:52:45 +0800
From: Sean Wang <sean.wang@...iatek.com>
To: Matthias Brugger <matthias.bgg@...il.com>
CC: <sboyd@...eaurora.org>, <mturquette@...libre.com>,
<robh+dt@...nel.org>, <mark.rutland@....com>,
<p.zabel@...gutronix.de>, <devicetree@...r.kernel.org>,
<linux-mediatek@...ts.infradead.org>, <linux-clk@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2 1/6] dt-bindings: gpu: mali-utgard: add
mediatek,mt7623-mali compatible
On Mon, 2018-06-25 at 17:14 +0200, Matthias Brugger wrote:
>
> On 27/04/18 10:14, sean.wang@...iatek.com wrote:
> > From: Sean Wang <sean.wang@...iatek.com>
> >
> > The MediaTek MT7623 SoC contains a Mali-450, so add a compatible for it
> > and define its own vendor-specific properties.
> >
> > Reviewed-by: Rob Herring <robh@...nel.org>
> > Signed-off-by: Sean Wang <sean.wang@...iatek.com>
> > ---
>
> Hi Rob,
>
> Any comments regarding this patch?
>
> Regards,
> Matthias
>
Hi, Matthias
I've already got a Reviewed-by tag from Rob.
Is it possible that this patch go through your tree ?
Sean
> > Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt | 9 +++++++++
> > 1 file changed, 9 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt
> > index 99d1c0a..656068f 100644
> > --- a/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt
> > +++ b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt
> > @@ -19,6 +19,7 @@ Required properties:
> > + rockchip,rk3228-mali
> > + rockchip,rk3328-mali
> > + stericsson,db8500-mali
> > + + mediatek,mt7623-mali
> >
> > - reg: Physical base address and length of the GPU registers
> >
> > @@ -89,6 +90,14 @@ to specify one more vendor-specific compatible, among:
> > * interrupt-names and interrupts:
> > + combined: combined interrupt of all of the above lines
> >
> > + - mediatek,mt7623-mali
> > + Required properties:
> > + * resets: phandle to the reset line for the GPU
> > + * mediatek,larb: phandle pointed to the local arbiter used to control the
> > + access to external memory on the SoC.
> > + see Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt
> > + for details
> > +
> > Example:
> >
> > mali: gpu@...0000 {
> >
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