lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <CAOMZO5DoRUSOfV_oh242w6s_1Zs8yAy9Kf4D+WdYym5c+6nucg@mail.gmail.com>
Date:   Wed, 27 Jun 2018 11:31:22 -0300
From:   Fabio Estevam <festevam@...il.com>
To:     Anson Huang <Anson.Huang@....com>
Cc:     Shawn Guo <shawnguo@...nel.org>,
        Sascha Hauer <s.hauer@...gutronix.de>,
        Sascha Hauer <kernel@...gutronix.de>,
        Fabio Estevam <fabio.estevam@....com>,
        Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@...r.kernel.org>, NXP Linux Team <Linux-imx@....com>,
        "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" 
        <linux-arm-kernel@...ts.infradead.org>,
        linux-kernel <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] ARM: dts: imx6sll-evk: enable usdhc3 slot

Hi Anson,

On Wed, Jun 27, 2018 at 5:36 AM, Anson Huang <Anson.Huang@....com> wrote:

> +&usdhc3 {
> +       pinctrl-names = "default", "state_100mhz", "state_200mhz";
> +       pinctrl-0 = <&pinctrl_usdhc3>;
> +       pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
> +       pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
> +       cd-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>;
> +       keep-power-in-suspend;
> +       enable-sdio-wakeup;
> +       vmmc-supply = <&reg_sd3_vmmc>;
> +       status = "okay";
> +};
> +
>  &usbotg1 {

Please keep the nodes sorted in alphabetical order.

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ