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Message-Id: <5B3B4AB802000078001D0216@prv1-mh.provo.novell.com>
Date: Tue, 03 Jul 2018 04:06:48 -0600
From: "Jan Beulich" <JBeulich@...e.com>
To: "David Laight" <David.Laight@...LAB.COM>
Cc: "Borislav Petkov" <bp@...en8.de>, <brgerst@...il.com>,
"Peter Zijlstra" <peterz@...radead.org>,
"Andrew Lutomirski" <luto@...nel.org>,
"Ingo Molnar" <mingo@...nel.org>, <tglx@...utronix.de>,
"Linus Torvalds" <torvalds@...ux-foundation.org>,
"Denys Vlasenko" <dvlasenk@...hat.com>,
"Josh Poimboeuf" <jpoimboe@...hat.com>,
<linux-kernel@...r.kernel.org>,
<linux-tip-commits@...r.kernel.org>, <hpa@...or.com>
Subject: RE: [tip:x86/asm] x86/entry/64: Add two more instruction
suffixes
>>> On 03.07.18 at 10:46, <David.Laight@...LAB.COM> wrote:
> From: Jan Beulich
>> Sent: 03 July 2018 09:36
> ...
>> As said there, omitting suffixes from instructions in AT&T mode is bad
>> practice when operand size cannot be determined by the assembler from
>> register operands, and is likely going to be warned about by upstream
>> gas in the future (mine does already).
> ...
>> - bt $9, EFLAGS(%rsp) /* interrupts off? */
>> + btl $9, EFLAGS(%rsp) /* interrupts off? */
>
> Hmmm....
> Does the operand size make any difference at all for the bit instructions?
> I'm pretty sure that the cpus (386 onwards) have always done aligned 32bit
> transfers (the docs never actually said aligned).
> I can't remember whether 64bit mode allows immediates above 31.
>
> So gas accepting 'btb $n,memory' is giving a false impression of
> what actually happens.
BTB does not exist at all. BTW and (on 64-bit) BTQ do exist though,
and they have behavior differing from BTL. The only AT&T syntax doc
I have says that L is the default suffix to be used, but there are cases
where this wasn't (and maybe still isn't) the case, so omitting a suffix
when register operands aren't available to size instructions has always
been a risky game.
Jan
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